2-PHASE GAIN CALIBRATION AND SCALING SCHEME FOR SWITCHED CAPACITOR SIGMA-DELTA MODULATOR

    公开(公告)号:EP2454816B1

    公开(公告)日:2018-11-28

    申请号:EP10735390.6

    申请日:2010-07-15

    CPC classification number: H03M1/0663 H03M1/0665 H03M3/422 H03M3/456 H03M3/464

    Abstract: A sigma-delta modulator may have a plurality of capacitor pairs, a plurality of switches to couple any pair of capacitors from the plurality of capacitor pairs selectively to an input signal or a reference signal, and a control unit operable to control sampling through the switches to perform a charge transfer in two phases wherein any pair of capacitors can be selected to be assigned to the input signal or the reference signal, and wherein after a plurality of charge transfers a gain error cancellation is performed by rotating the capacitor pairs cyclically such that after a rotation cycle, each capacitor pair has been assigned a first predetermined number of times to the input signal, and has also been assigned a second predetermined number of times to the reference signal.

    PERFORMING ENHANCED SIGMA-DELTA MODULATION
    3.
    发明公开
    PERFORMING ENHANCED SIGMA-DELTA MODULATION 审中-公开
    实施增强的Σ-Δ调制技术

    公开(公告)号:EP2647129A1

    公开(公告)日:2013-10-09

    申请号:EP11794323.3

    申请日:2011-11-28

    CPC classification number: H03M3/492 H03M3/422 H03M3/456

    Abstract: In general, techniques are described for performing enhanced sigma-delta modulation. For example, an apparatus comprising a predictive filter unit, an amplifier, an oversampling unit and a sigma-delta modulation unit may implement the techniques. The predictive filter unit performs predictive filtering on an input signal to generate a filtered signal and computes an estimate of a predictive gain as a function of an energy of the input signal and an energy of the filtered signal. The amplifier receives the filtered signal and amplifies the filtered signal based on the predictive gain to generate an amplified signal. The oversampling unit receives the amplifies signal and performs oversampling in accordance with an oversampling rate to generate an oversampled signal. The sigma-delta modulation unit receives the oversampled signal and performs sigma-delta modulation to generate a modulated signal.

    Analog signal sampling system and method having reduced average input current
    4.
    发明公开
    Analog signal sampling system and method having reduced average input current 有权
    模拟信号感测系统和方法具有降低的介质差分输入电流

    公开(公告)号:EP2343808A3

    公开(公告)日:2012-06-20

    申请号:EP11161019.2

    申请日:2005-10-17

    CPC classification number: H03M3/322 H03M3/43 H03M3/456 H03M3/496

    Abstract: The invention is directed to a novel sampling system having a sampling device responsive to an analog input signal and a reference signal for providing corresponding charges. A switching circuit is provided to supply the input signal and the reference signal to the sampling device. The switching circuit is controlled to supply the input signal and the reference signal to the sampling device so as provide a substantially zero total charge taken by the sampling device from a source of the input signal. One application of the foregoing is in analog-to-digital conversion.

    Signal processing circuit
    5.
    发明公开
    Signal processing circuit 审中-公开
    Signalverarbeitungsschaltung

    公开(公告)号:EP2337226A2

    公开(公告)日:2011-06-22

    申请号:EP10195269.5

    申请日:2010-12-15

    Inventor: Onishi, Akinobu

    CPC classification number: H03M3/322 H03M1/089 H03M1/12 H03M3/43 H03M3/456

    Abstract: A signal processing circuit includes: an AD converter configured to quantize an input signal, whose amplitude changes in accordance with temperature, within a set voltage range and convert the quantized input signal into a digital signal; and a setting circuit configured to set the voltage range so as to be wider when the input signal is greater in amplitude in accordance with the temperature and so as to be narrower when the input signal is smaller in amplitude in accordance with the temperature.

    Abstract translation: 信号处理电路包括:AD转换器,被配置为在设定的电压范围内对其幅度根据温度变化的输入信号进行量化,并将量化的输入信号转换为数字信号; 以及设定电路,其被配置为当输入信号根据温度在振幅较大时将电压范围设定得更宽,并且当输入信号根据温度变化较小时,设定电路将变窄。

    FIVE-LEVEL FEED-BACK DIGITAL-TO-ANALOG CONVERTER FOR A SWITCHED CAPACITOR SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER
    6.
    发明授权
    FIVE-LEVEL FEED-BACK DIGITAL-TO-ANALOG CONVERTER FOR A SWITCHED CAPACITOR SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER 有权
    WITH五级FEEDBACK FOR A数字/模拟转换开关电容西格玛德尔塔模/数转换

    公开(公告)号:EP1784918B1

    公开(公告)日:2011-02-09

    申请号:EP05779768.0

    申请日:2005-08-10

    Inventor: DEVAL, Philippe

    CPC classification number: H03M3/434 H03M3/456

    Abstract: A five-level feed-back digital-to-analog converter (DAC) in a switched capacitor sigma-delta analog-to-digital converter has an improved switching sequence that boosts from two to five the number of quantization levels of the feed-back DAC. Switching sequences are used to obtain five equally distributed charge levels C * VREF, C * VREF/2, 0, -C * VREF/2 and -C * VREF. When summed with an input voltage, VIN, the five-level feed­back DAC produces five equally distributed output voltages of A * VIN + VREF, A * VIN + VREF/2, A * VIN + 0, A * VIN - VREF/2 and A * VIN - VREF, where A is gain, VIN is the input voltage, and VREF is the reference voltage.

    High precision analog to digital converter
    8.
    发明公开
    High precision analog to digital converter 有权
    Hochgenauer Analog-Digital-Wandler

    公开(公告)号:EP2026468A2

    公开(公告)日:2009-02-18

    申请号:EP08166543.2

    申请日:2003-04-30

    Applicant: O2Micro, Inc.

    CPC classification number: H03M3/34 H03M3/43 H03M3/456

    Abstract: An analog to digital converter (ADC) includes a cross switch array coupled between an input switch array and an integrator configured to alternately transfer charges from a first input capacitor and a second input capacitor to a first integration capacitor and a second integration capacitor thereby improving linearity problems caused by capacitor mismatching. The cross switch array may also be configured to transfer charges from the first input capacitor to the first integration capacitor and from the second input capacitor to the second integration capacitor during a first charge transfer time interval, and from the first input capacitor to the second integration capacitor and from the second input capacitor to the first integration capacitor during a second charge transfer time interval. A sensing system including and ADC consistent with the invention is also provided. Various methods of transferring charges in an ADC are also provided.

    Abstract translation: 模数转换器(ADC)包括耦合在输入开关阵列和积分器之间的交叉开关阵列,其被配置为将电荷从第一输入电容器和第二输入电容器交替地传输到第一积分电容器和第二积分电容器,从而提高线性度 电容器不匹配引起的问题。 交叉开关阵列还可以被配置为在第一电荷转移时间间隔期间将电荷从第一输入电容器转移到第一积分电容器并且从第二输入电容器转移到第二积分电容器,并且从第一输入电容器到第二积分 电容器,并且在第二电荷转移时间间隔期间从第二输入电容器到第一积分电容器。 还提供了包括与本发明一致的感测系统和ADC。 还提供了在ADC中传送电荷的各种方法。

    ANALOG SIGNAL SAMPLING SYSTEM AND METHOD HAVING REDUCED AVERAGE INPUT CURRENT
    9.
    发明公开
    ANALOG SIGNAL SAMPLING SYSTEM AND METHOD HAVING REDUCED AVERAGE INPUT CURRENT 有权
    系统模拟信号采样和方法具有降低平均输入电流

    公开(公告)号:EP1805898A4

    公开(公告)日:2009-01-07

    申请号:EP05812353

    申请日:2005-10-17

    Inventor: OPRESCU FLORIN A

    CPC classification number: H03M3/322 H03M3/43 H03M3/456 H03M3/496

    Abstract: A novel sampling system having a sampling device responsive to an analog input signal and a reference signal for providing corresponding charges. A switching circuit is provided to supply the input signal and the reference signal to the sampling device. The switching circuit is controlled to supply the input signal and the reference signal to the sampling device so as provide a substantially zero total charge taken by the sampling device from a source of the input signal. One application of the foregoing is in analog-to-digital conversion.

    ANALOG SIGNAL SAMPLING SYSTEM AND METHOD HAVING REDUCED AVERAGE DIFFERENTIAL INPUT CURRENT
    10.
    发明公开
    ANALOG SIGNAL SAMPLING SYSTEM AND METHOD HAVING REDUCED AVERAGE DIFFERENTIAL INPUT CURRENT 有权
    模拟信号扫描并且以降低MIDDLE差分输入电源程序

    公开(公告)号:EP1810406A1

    公开(公告)日:2007-07-25

    申请号:EP05812383.7

    申请日:2005-10-17

    CPC classification number: H03M3/322 H03M3/43 H03M3/456 H03M3/496

    Abstract: A novel sampling system having a sampling device responsive to an analog input signal and a reference signal for providing corresponding charges. A switching circuit is provided to supply the input signal and the reference signal to the sampling device. The switching circuit is controlled to supply the input signal and the reference signal to the sampling device so as provide a substantially zero total charge taken by the sampling device from a source of the input signal. One application of the foregoing is in analog-to-digital conversion.

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