Abstract:
A sigma-delta modulator may have a plurality of capacitor pairs, a plurality of switches to couple any pair of capacitors from the plurality of capacitor pairs selectively to an input signal or a reference signal, and a control unit operable to control sampling through the switches to perform a charge transfer in two phases wherein any pair of capacitors can be selected to be assigned to the input signal or the reference signal, and wherein after a plurality of charge transfers a gain error cancellation is performed by rotating the capacitor pairs cyclically such that after a rotation cycle, each capacitor pair has been assigned a first predetermined number of times to the input signal, and has also been assigned a second predetermined number of times to the reference signal.
Abstract:
In general, techniques are described for performing enhanced sigma-delta modulation. For example, an apparatus comprising a predictive filter unit, an amplifier, an oversampling unit and a sigma-delta modulation unit may implement the techniques. The predictive filter unit performs predictive filtering on an input signal to generate a filtered signal and computes an estimate of a predictive gain as a function of an energy of the input signal and an energy of the filtered signal. The amplifier receives the filtered signal and amplifies the filtered signal based on the predictive gain to generate an amplified signal. The oversampling unit receives the amplifies signal and performs oversampling in accordance with an oversampling rate to generate an oversampled signal. The sigma-delta modulation unit receives the oversampled signal and performs sigma-delta modulation to generate a modulated signal.
Abstract:
The invention is directed to a novel sampling system having a sampling device responsive to an analog input signal and a reference signal for providing corresponding charges. A switching circuit is provided to supply the input signal and the reference signal to the sampling device. The switching circuit is controlled to supply the input signal and the reference signal to the sampling device so as provide a substantially zero total charge taken by the sampling device from a source of the input signal. One application of the foregoing is in analog-to-digital conversion.
Abstract:
A signal processing circuit includes: an AD converter configured to quantize an input signal, whose amplitude changes in accordance with temperature, within a set voltage range and convert the quantized input signal into a digital signal; and a setting circuit configured to set the voltage range so as to be wider when the input signal is greater in amplitude in accordance with the temperature and so as to be narrower when the input signal is smaller in amplitude in accordance with the temperature.
Abstract:
A five-level feed-back digital-to-analog converter (DAC) in a switched capacitor sigma-delta analog-to-digital converter has an improved switching sequence that boosts from two to five the number of quantization levels of the feed-back DAC. Switching sequences are used to obtain five equally distributed charge levels C * VREF, C * VREF/2, 0, -C * VREF/2 and -C * VREF. When summed with an input voltage, VIN, the five-level feedback DAC produces five equally distributed output voltages of A * VIN + VREF, A * VIN + VREF/2, A * VIN + 0, A * VIN - VREF/2 and A * VIN - VREF, where A is gain, VIN is the input voltage, and VREF is the reference voltage.
Abstract:
An analog to digital converter (ADC) includes a cross switch array coupled between an input switch array and an integrator configured to alternately transfer charges from a first input capacitor and a second input capacitor to a first integration capacitor and a second integration capacitor thereby improving linearity problems caused by capacitor mismatching. The cross switch array may also be configured to transfer charges from the first input capacitor to the first integration capacitor and from the second input capacitor to the second integration capacitor during a first charge transfer time interval, and from the first input capacitor to the second integration capacitor and from the second input capacitor to the first integration capacitor during a second charge transfer time interval. A sensing system including and ADC consistent with the invention is also provided. Various methods of transferring charges in an ADC are also provided.
Abstract:
A novel sampling system having a sampling device responsive to an analog input signal and a reference signal for providing corresponding charges. A switching circuit is provided to supply the input signal and the reference signal to the sampling device. The switching circuit is controlled to supply the input signal and the reference signal to the sampling device so as provide a substantially zero total charge taken by the sampling device from a source of the input signal. One application of the foregoing is in analog-to-digital conversion.
Abstract:
A novel sampling system having a sampling device responsive to an analog input signal and a reference signal for providing corresponding charges. A switching circuit is provided to supply the input signal and the reference signal to the sampling device. The switching circuit is controlled to supply the input signal and the reference signal to the sampling device so as provide a substantially zero total charge taken by the sampling device from a source of the input signal. One application of the foregoing is in analog-to-digital conversion.