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    ULTRA-WIDEBAND COMMUNICATION APPARATUS AND METHODS
    4.
    发明公开
    ULTRA-WIDEBAND COMMUNICATION APPARATUS AND METHODS 审中-公开
    超宽带通信设备和方法

    公开(公告)号：EP1803226A2

    公开(公告)日：2007-07-04

    申请号：EP05811969.4

    申请日：2005-10-04

    申请人： Pulse-Link, Inc.

    发明人： LAKKIS, Ismail

    IPC分类号： H04B1/00 ,  H04B7/02 ,  H04L1/02

    CPC分类号： H04B7/068 ,  H04B1/71637 ,  H04B1/719 ,  H04B7/022 ,  H04B7/0667 ,  H04B7/0814 ,  H04B7/0894 ,  H04B7/10 ,  H04B7/12 ,  H04L1/0002 ,  H04L1/0026 ,  H04L1/06 ,  H04L1/0618 ,  H04L5/0005 ,  H04L5/0041 ,  H04L25/0204 ,  H04L25/0212 ,  H04L2025/0335 ,  H04L2025/03445 ,  H04L2025/03522

    摘要： Ultra-wideband (UWB) communication systems and apparatus are provided. One embodiment of an UWB signals receiver may include a first antenna (3402) that receives UWB signals, and a second antenna (3404) that also receives UWB signals. The UWB receiver also includes a delay element (3408) communicating with the second antenna (3404), with the delay element delaying the UWB signals received by the second antenna (3404). A combiner (3412) in the receiver then combines the UWB signals received by the first antenna (3402) with the delayed UWB signals received by the second antenna (3404). This Abstract is provided for the sole purpose of complying with the Abstract requirement rules that allow a reader to quickly ascertain the subject matter of the disclosure contained herein. This Abstract is submitted with the explicit understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

    摘要翻译： 超宽带（UWB）通信系统和设备被提供。 UWB信号接收器的一个实施例可以包括接收UWB信号的第一天线（3402）以及也接收UWB信号的第二天线（3404）。 UWB接收机还包括与第二天线（3404）通信的延迟元件（3408），其中延迟元件延迟由第二天线（3404）接收的UWB信号。 接收器中的组合器（3412）然后将由第一天线（3402）接收的UWB信号与由第二天线（3404）接收的延迟的UWB信号进行组合。 本摘要仅用于遵守抽象要求规则的唯一目的，其允许读者快速确定本文所包含的公开内容的主题。 这份摘要的提交是明确的理解，它不会被用来解释或限制权利要求的范围或含义。

    Adaptive equalizer with DC offset compensation
    6.
    发明公开
    Adaptive equalizer with DC offset compensation 审中-公开
    Adaptiver Entzerrer mit Kompensation des Gleichspannungsversatzes

    公开(公告)号：EP1566932A2

    公开(公告)日：2005-08-24

    申请号：EP05250672.2

    申请日：2005-02-07

    申请人： FUJITSU LIMITED

    发明人： Gai, Weixin ,  Hidaka, Yasuo

    IPC分类号： H04L25/03

    CPC分类号： H04L25/03038 ,  H03F3/45183 ,  H03F3/45475 ,  H03F3/45748 ,  H03F3/45973 ,  H03F2203/45424 ,  H03F2203/45458 ,  H03F2203/45652 ,  H03F2203/45702 ,  H03G5/165 ,  H04L25/061 ,  H04L2025/03445 ,  H04L2025/03592

    摘要： A method for compensating for attenuation in an input signal includes receiving an input (D IN ) signal, communicating a first portion of the input signal on a first path (101A), communicating a second portion of the input signal on a second path (101B), and communicating a third portion of the input signal on a third path (101C). The method also includes applying a first gain to the first portion of the input signal, applying a first-order mathematical operation (S) and a second gain to the second portion of the input signal, and applying a second-order mathematical operation (S) and a third gain to the third portion of the input signal. The method further includes recombining the first portion, the second portion, and the third portion into an output signal (D OUT ).

    摘要翻译： 用于补偿输入信号中的衰减的方法包括接收输入（D IN）信号，在第一路径（101A）上传送输入信号的第一部分，在第二路径（101B）上传送输入信号的第二部分 ），并且在第三路径（101C）上传送输入信号的第三部分。 该方法还包括对输入信号的第一部分施加第一增益，向输入信号的第二部分施加一阶数学运算（S）和第二增益，以及应用二阶数学运算（S ）和对输入信号的第三部分的第三增益。 该方法还包括将第一部分，第二部分和第三部分重新组合成输出信号（D OUT）。

    METHODS AND SYSTEMS FOR DSP-BASED RECEIVERS
    7.
    发明公开
    METHODS AND SYSTEMS FOR DSP-BASED RECEIVERS 有权
    方法和系统数字信号处理基于接收器的

    公开(公告)号：EP1374407A2

    公开(公告)日：2004-01-02

    申请号：EP02725024.0

    申请日：2002-03-01

    申请人： Broadcom Corporation

    发明人： AGAZZI, Oscar ,  GOPINATHAN, Venugopal

    IPC分类号： H03M1/06 ,  H03M1/12

    CPC分类号： H04B10/6971 ,  H03M1/0604 ,  H03M1/0607 ,  H03M1/0624 ,  H03M1/0836 ,  H03M1/1215 ,  H04B10/6933 ,  H04B10/697 ,  H04L7/0062 ,  H04L25/03057 ,  H04L25/03159 ,  H04L2025/03445

    摘要： Digital signal processing based methods and systems for receiving data signals include parallel receivers, multi-channel receivers, timing recovery schemes, and, without limitation, equalization schemes. The present invention is implemented as a multi-path parallel receiver in which an analog-to-digital converter ('ADC') and/or a digital signal processor ('DSP') are implemented with parallel paths that operate at lower rates than the received data signal. In an embodiment, a parallel DSP-based receiver in accordance with the invention includes a separate timing recovery loop for each ADC path. The separate timing recovery loops can be used to compensate for timing phase errors in the clock generation circuit that are different for each path. In an embodiment, a parallel DSP-based receiver includes a separate automatic gain control (AGC) loop for each ADC path. The separate AGC loops can be used to compensate for gain errors on a path-by-path basis. In an embodiment, a parallel DSP-based receiver includes a separate offset compensation loop for each ADC path. The separate offset compensation loops can be used to independently compensate for offsets that are different for each path. In an embodiment the present invention is implemented as a multi-channel receiver that receives a plurality of data signals. In an embodiment, one or more of the following types of equalization are performed, alone and/or in various combinations with one another: Viterbi equalization; feed-forward equalization ('FFE'); and/or decision feed-back equalization ('DFE').

    METHODS AND SYSTEMS FOR DIGITALLY PROCESSING OPTICAL DATA SIGNALS
    8.
    发明公开
    METHODS AND SYSTEMS FOR DIGITALLY PROCESSING OPTICAL DATA SIGNALS 有权
    方法和系统用于处理数字光学数据信号

    公开(公告)号：EP1312177A2

    公开(公告)日：2003-05-21

    申请号：EP01954849.4

    申请日：2001-07-23

    申请人： Broadcom Corporation

    发明人： AGAZZI, Oscar, E. ,  GOPINATHAN, Venugopal

    IPC分类号： H04B10/158 ,  H04B10/18 ,  H04L25/03

    CPC分类号： H04L25/03159 ,  H03M1/0604 ,  H03M1/0607 ,  H03M1/0624 ,  H03M1/0836 ,  H03M1/1215 ,  H04B10/697 ,  H04L25/03057 ,  H04L2025/03445

    摘要： Digital signal processing based methods and systems for receiving electrical and/or optical data signals include electrical receivers, optical receivers, parallel receivers, multi-channel receivers, timing recovery schemes, and, without limitation, equalization schemes. The present invention is implemented as a single path receiver. Alternatively, the present invention is implemented as a multi-path parallel receiver in which an analog-to-digital converter ('ADC') and/or a digital signal processor ('DSP') are implemented with parallel paths that operate at lower rates than the received data signal. In an embodiment, a parallel DSP-based receiver in accordance with the invention includes a separate timing recovery loop for each ADC path. The separate timing recovery loops can be used to compensate for timing phase errors in the clock generation circuit that are different for each path. In an embodiment, a parallel DSP-based receiver includes a separate automatic gain control (AGC) loop for each ADC path. The separate AGC loops can be used to compensate for gain errors on a path-by-path basis. In an embodiment, a parallel DSP-based receiver includes a separate offset compensation loop for each ADC path. The separate offset compensation loops can be used to independently compensate for offsets that are different for each path. In an embodiment the present invention is implemented as a multi-channel receiver that receives a plurality of data signals. In an embodiment, a receiver performs DSP-based equalization on electrical data signals and/or on electrical representations of optical data signals. Equalization is performed in single path receivers and parallel multi-path receivers, on electrical data signals and/or optical data signals. One or more of the following types of equalization are performed, alone and/or in various combinations with one another: Viterbi equalization; feed-forward equalization ('FFE'); and/or decision feed-back equalization ('DFE').

    Non-iterative time-domain equilizer
    9.
    发明公开
    Non-iterative time-domain equilizer 审中-公开
    Nicht-iterativer im Zeitbereicht arbeitender Entzerrer

    公开(公告)号：EP1284563A2

    公开(公告)日：2003-02-19

    申请号：EP02255522.1

    申请日：2002-08-07

    申请人： Broadcom Corporation

    发明人： Liang, Haixiang

    IPC分类号： H04L25/03

    CPC分类号： H04L25/03019 ,  H04L25/03012 ,  H04L2025/03414 ,  H04L2025/03445 ,  H04L2025/03605

    摘要： A method for forming a non-iterative time-domain equalizer (TEQ) and apparatus corresponding thereto. A channel response H(z) is followed by a TEQ response A(z) and a residual output B(z) is chosen so that its degree is less than a cyclic prefix. An error signal is formed so that E(z) = H(z)A(z) - B(z). With a unit input, the error signal is set to zero and B(z) = H(z)A(z). Each signal is expressed as a polynomial, having varying degrees, and a having corresponding coefficients. Once expanded, the coefficients of similar degree can be equated on both sides of the equation. The error signal can then be determined in terms of coefficients corresponding to the TEQ and the residual signal. The coefficients of the channel response can be derived from the channel training estimates. The error signal is minimized and the result is solved for in terms of the desired TEQ coefficients.

    摘要翻译： 通道H（z）之后是TEQ A（z），并且剩余输出B（z）被选择为使得其长度小于循环前缀的长度。 每个信号被表示为具有不同程度的多项式以及相应的系数。 一旦扩展，相似程度的系数可以相等。 然后可以根据对应于TEQ和残余信号的系数来确定误差信号。 信道响应的系数可以从信道训练估计导出。 误差信号被最小化，并且根据期望的TEQ系数求解结果。

    Time domain filter for a communication channel
    10.
    发明公开
    Time domain filter for a communication channel 失效
    ZeitbereichfilterfürKommunikationskanal

    公开(公告)号：EP0766390A2

    公开(公告)日：1997-04-02

    申请号：EP96307037.0

    申请日：1996-09-26

    申请人： SEAGATE TECHNOLOGY, INC.

    发明人： Minuhin, Vadim Boris ,  Kovner, Vladimir ,  Surendran, Srinivasan

    IPC分类号： H03H21/00 ,  H04L25/497 ,  H04L25/03 ,  G11B20/10

    CPC分类号： H03H21/0012 ,  G11B20/10009 ,  H04L7/0058 ,  H04L2025/03369 ,  H04L2025/03445 ,  H04L2025/03611

    摘要： An analog, adaptive generalized transversal equalizer 22 for use in the filtering system 10 of a disc drive PRML read channel, the transversal equalizer 22 employing non-ideal delay elements. The filtering system 10 comprises the equalizer 22 connected in series with an adaptive, analog prefilter 14. The prefilter 14 is comprised of a plurality of serially connected, adaptive, analog filter stages 54 having variable transfer functions determined by adaptive parameter signals received by the filter stages. The generalized transversal equalizer 22 comprises a plurality of serially connected, adaptive, analog low pass filters 92,94,96,98, having taps on either side of each low pass filter 92,94,96,98, a plurality of multipliers 100,102,104,106,108, that receive signals at the tap locations of the filters 92,94,96,98, and a summing circuit 120 that receives the outputs of the multipliers 100,102,104,106,108. The transfer functions of the filters 92,94,96,96,98, are continuously variable in relation to adaptive parameter signals received by the filters 92,94,96,98, and the coefficients of multiplication are variable in relation to the adaptation process.

    摘要翻译： 用于盘驱动器PRML读通道的滤波系统10的模拟自适应广义横向均衡器22，横向均衡器22采用非理想延迟元件。 滤波系统10包括与自适应模拟预滤波器14串联连接的均衡器22.预滤波器14包括多个串联的自适应模拟滤波器级54，其具有由滤波器接收的自适应参数信号确定的可变传递函数 阶段。 广义横向均衡器22包括多个串联连接的自适应模拟低通滤波器92,94,96,98，每个低通滤波器92,94,96,98的两侧具有抽头，多个乘法器100,102,104,106,108， 其在滤波器92,94,96,98的抽头位置处接收信号，以及接收乘法器100,102,104,106,108的输出的求和电路120。 滤波器92,94,96,96,98的传递函数关于由滤波器92,94,96,98接收的自适应参数信号是连续可变的，并且乘法系数相对于适应过程是可变的 。