Apparatus for recording and reproducing a video signal
    3.
    发明公开
    Apparatus for recording and reproducing a video signal 失效
    用于记录和再现视频信号的设备

    公开(公告)号:EP0550232A1

    公开(公告)日:1993-07-07

    申请号:EP92311641.2

    申请日:1992-12-21

    申请人: SONY CORPORATION

    IPC分类号: H04N9/83 H04N5/91

    摘要: A recording and reproducing apparatus prevents deterioration of the picture quality from being caused by overshoot, ringing or a noise component when, using a video tape recorder which can process two kinds of video signals having different aspect ratios, a video signal having a larger one of the aspect ratios is displayed on a television set. The recording and reproducing apparatus comprises a peaking circuit (19) for adding an overshoot or a ringing to a video signal, a noise canceller circuit (21) for cancelling noise from the video signal, and a comb line filter (22) for removing noise from the video signal. The peaking circuit, the noise canceller circuit and the comb line filter are capable of changing over the peaking frequency, the noise cancelling characteristic and the comb line filter characteristic thereof, respectively, in accordance with the aspect ratio of the video signal.

    摘要翻译: 本发明提供一种记录和再现设备,当使用能够处理具有不同高宽比的两种视频信号的录像机时,防止由于过冲,振铃或噪声分量引起的画面质量劣化, 宽高比显示在电视机上。 记录和再现设备包括用于将过冲或振铃添加到视频信号的峰化电路(19),用于消除来自视频信号的噪声的噪声消除器电路(21)以及用于消除噪声的梳状滤波器(22) 来自视频信号。 峰化电路,噪声消除器电路和梳状线滤波器能够根据视频信号的宽高比分别改变峰化频率,噪声消除特性和梳状滤波器特性。

    Picture quality correcting device
    4.
    发明公开
    Picture quality correcting device 失效
    图像质量校正装置

    公开(公告)号:EP0516463A3

    公开(公告)日:1993-03-24

    申请号:EP92304935.7

    申请日:1992-05-29

    发明人: Funayama, Mituo

    IPC分类号: H04N5/21 H04N5/91

    CPC分类号: H04N5/931 H04N5/21 H04N5/911

    摘要: A picture quality correcting device which no longer relies solely on the frequency characteristic for picture quality correction, and which prevents disturbance in the group delay characteristic occurring due to a large variation in the frequency characteristic of the luminance signal, thereby greatly decreasing deterioration of picture quality of the played-back image. A noise component from the luminance signal is extracted by a noise canceller. Then, the noise component is deducted from the luminance signal by inverting the polarity of the noise component and composing it with the luminance signal. The high-frequency component of the luminance signal released by the noise canceller is corrected by a picture-tone circuit. The amount of noise suppression of the noise canceller and the amount of correction of the high-frequency component of the picture-tone circuit is made variable according to a control voltage by adjusting a picture quality adjuster. The amount of noise suppression of the noise canceller is adjusted, for example, according to a limiting level setting voltage generated by an LLC circuit.

    Television composite video signal processing circuit
    9.
    发明公开
    Television composite video signal processing circuit 失效
    电视复合视频信号处理电路

    公开(公告)号:EP0175346A3

    公开(公告)日:1988-08-24

    申请号:EP85111745

    申请日:1985-09-17

    IPC分类号: H04N05/93

    CPC分类号: H04N5/931 Y10S348/91

    摘要: © A television composite video signal processing circuit has a readout circuit (21 to 24) for repeatedly reading out a one-field composite video signal from a disk memory; a delay circuit (25) for delaying the composite video signal from the readout circuit (21 to 24) by 1/2 of a horizontal sync signal period H, a pedestal clamping circuit (31, 32, 34, C5) for setting the pedestal levels of the composite video signals from the delay circuit (25) and the readout circuit (21 to 24) to a predetermined level, a signal selector (Tr1, Tr2, 28, R27) for alternately supplying the composite video signals from the readout circuit (21 to 24) and the delay circuit (25) to the pedestal clamping circuit (31,32,34, C5) for every other field, and a peak level correction circuit for correcting peak the level of the delayed video signal in the delayed composite video signal from the delay circuit (25). The peak level correction circuit (PLD1, PLD2, 26, 27, 29, 30) corrects the peak level of the delayed video signal from the dely circuit (25) so as to match this peak level with that of the nondelayed video signal from the readout circuit (21 to 24) in accordance with a peak level difference between the delayed and nondelayed video signals.