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    Deinterlacing apparatus and method
    3.
    发明公开
    Deinterlacing apparatus and method 审中-公开
    Vorrichtung und Verfahren zur Aufhebung des Zeilensprungverfahrens

    公开(公告)号：EP1387577A2

    公开(公告)日：2004-02-04

    申请号：EP03016829.8

    申请日：2003-07-23

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Jung, You-young ,  Lee, Young-ho ,  Yang, Seung-joon, 301-1204, Daewoo Apartment

    IPC分类号： H04N5/44

    CPC分类号： H04N9/45 ,  H04N7/0115 ,  H04N7/012

    摘要： A deinterlacing apparatus and method use a buffer unit having a previous field buffer, a current field buffer, and a next field buffer to store, sequentially, individual fields of an image signal; calculate a Sum of Absolute Difference (SAD) value of a predetermined search region unit with reference to a next field stored in the next field buffer and a previous field stored in the previous field buffer; determine whether the predetermined search region is a still region and whether a source of the image signal is a film based on the SAD value; uses a 3D interpolation unit to output adaptively a temporal interpolation value and a spatial interpolation value based on motion information; and adaptively select a deinterlacing result based on the previous field, the next field, and an output of the 3D interpolation unit according to a signal outputted from the still region/film mode detection unit.

    摘要翻译： 去隔行扫描装置和方法使用具有先前场缓冲器，当前场缓冲器和下一场缓冲器的缓冲器单元顺序地存储图像信号的各个场; 参考存储在下一个字段缓冲器中的下一个字段和存储在前一字段缓冲器中的先前字段来计算预定搜索区域单元的绝对差值（SAD）值; 确定所述预定搜索区域是否是静止区域，以及所述图像信号的源是否是基于所述SAD值的影片; 使用3D内插单元基于运动信息自适应地输出时间内插值和空间内插值; 并且根据从静止区域/胶片模式检测单元输出的信号，自适应地选择基于前一场，下一场和3D插值单元的输出的去隔行结果。

    Apparatus and method to derive a television color subcarrier frequency signal from a computer video signal
    6.
    发明公开
    Apparatus and method to derive a television color subcarrier frequency signal from a computer video signal 失效
    用于从计算机视频信号获得的彩色电视副载波信号的方法和装置

    公开(公告)号：EP0743798A2

    公开(公告)日：1996-11-20

    申请号：EP96303067.1

    申请日：1996-05-01

    申请人： AI TECH INTERNATIONAL

    发明人： Zhang, Sunny Y. ,  Lin, Justin J.

    IPC分类号： H04N9/45

    CPC分类号： H04N9/45

    摘要： A technique to derive a television color subcarrier frequency signal from a computer video signal is described, A computer generates a computer video signal including a horizontal synchronization signal component, The horizontal synchronization signal component is applied to a subcarrier frequency generator to produce a pixel clock signal and a subcarrier relative phase signal which are applied to a digital encoder. The digital encoder processes the computer video signal, the pixel clock signal, and the subcarrier relative phase signal to generate an analog baseband television signal. The subcarrier frequency generator includes a frequency conversion circuit, a timing source, and a deviation compensator. The conversion circuit receives the horizontal synchronization signal and generates the pixel clock signal. The timing source is used to generate a reference clock signal. The deviation compensator includes a signal comparison circuit to process the pixel clock signal and the reference clock signal and derive a count signal. A ratio counter circuit then processes the count signal and generates a subcarrier relative phase signal, for processing by the digital encoder.

    摘要翻译： 副载波发生器被连接的数字编码器和一个计算机，它基因率的水平同步信号之间。 该装置包括：频率转换电路，优先。 锁相环，其中基因率从计算机水平同步信号的像素时钟信号。 时钟设备基因速率的参考时钟信号和一个补偿器偏差处理该信号，地连同像素时钟信号以导出副载波的相对相位信号。 然后，将相对相位信号被用来产生电视信号的副载波。 县。 该偏差补偿器包括一个信号比较电路的计时器的由所有其一段由像素时钟信号确定的时间被激活，并且其在所述参考时钟信号进行计数过渡周期的计数器。 此外，该计数器是由控制逻辑，以提供选择信号给多路转换器，其读取从所述计数器的周期计数信号激活。

    Method and apparatus for overlaying digitally generated graphics over an analog video signal
    7.
    发明公开
    Method and apparatus for overlaying digitally generated graphics over an analog video signal 失效
    用于在一个模拟视频信号标记叠加数字方式产生图形的方法和装置

    公开(公告)号：EP0691791A2

    公开(公告)日：1996-01-10

    申请号：EP95303331.3

    申请日：1995-05-18

    申请人： GENERAL INSTRUMENT CORPORATION OF DELAWARE

    发明人： Zeidler, David E. ,  Simons, Robert M. ,  Zhu, Qiang

    IPC分类号： H04N9/64 ,  H04N5/445

    CPC分类号： H04N9/76 ,  H04N5/44504 ,  H04N9/45 ,  H04N9/641

    摘要： A system for overlaying digital character signals on an analog video source signal including a predetermined color subcarrier includes a subcarrier phase lock loop (14), a digital character generating device (28), a digital video encoder (18), and a switching device (24). The subcarrier phase lock loop separately generates a color subcarrier and a system clock signal which are locked to the color subcarrier of the analog video source signal. The digital character generating device detects horizontal and vertical timing of pixel information in the analog video source signal, and generates digital character signals that are to be overlaid in predetermined pixels of the analog video source signal. The digital video encoder is responsive to the color subcarrier and system clock signals for generating a separate color subcarrier which is locked to the color subcarrier of the analog video source signal. The digital video encoder also converts the digital character signals from the digital character generating means into an analog video output signal that includes the color subcarrier generated in the digital video encoder. The switching means directs the analog video output signal from the digital video encoder or the analog video source signal to an output of the system during pixels times when a digital character is to be overlaid or not overlaid, respectively, on the analog video source signal.

    摘要翻译： 一种用于在模拟视频源信号包括预定彩色副载波重叠的数字字符信号系统包括：副载波锁相环（14），数字字符产生装置（28），数字视频编码器（18），和一个开关装置（ 24）。 副载波锁相环单独基因率彩色副载波和哪个被锁定到模拟视频信号源的彩色副载波的系统时钟信号。 数字字符产生装置检测在模拟视频源信号的像素信息的水平和垂直定时，和基因率的数字字符信号那样被在模拟视频源信号的预定像素来覆盖。 数字视频编码器是响应于彩色副载波和系统时钟信号，用于产生一个单独的彩色副载波的所有被锁定到模拟视频信号源的彩色副载波。 数字视频编码器，使得来自数字字符发生装置成模拟视频输出信号并数字字符信号的数字视频编码器所产生的彩色副载波转换包括。 开关装置ausrichtet从数字视频编码器或期间像素×在系统的输出的模拟视频源信号提供给模拟视频输出信号。当一个数字字符是分别进行叠加或不叠加，在模拟视频源信号。

    Apparatus for processing a pal colour television signal
    8.
    发明公开
    Apparatus for processing a pal colour television signal 失效
    用于处理PAL彩色电视信号的装置

    公开(公告)号：EP0565333A3

    公开(公告)日：1994-05-11

    申请号：EP93302665.0

    申请日：1993-04-05

    申请人： QUESTECH LIMITED

    发明人： Tyson, Peter

    IPC分类号： H04N9/64 ,  H04N9/45 ,  H04N11/16

    CPC分类号： H04N11/165 ,  H04N9/44 ,  H04N9/45 ,  H04N9/64

    摘要： The phase of a burst locked oscillator (7) controlling a PAL chrominance decoder (4) is controlled by a processor including means (11,12) for summing V and U chrominance signal components of picture signal samples provided by the decoder, means (13 to 16) for protecting the difference between summed V from alternate lines of the picture signal, means (20,21) for integrating the V-difference value over a field of the television signal, and a second order loop filter (23) via which the integrated signal is applied to the oscillator (7) in a feed back loop to correct the phase of the oscillator.

    Television receiver having skew corrected clock
    10.
    发明公开
    Television receiver having skew corrected clock 失效
    Fernsehempfängermit verzerrungskorrigiertem Taktsignal。

    公开(公告)号：EP0550420A2

    公开(公告)日：1993-07-07

    申请号：EP93200689.3

    申请日：1988-03-28

    申请人： RCA Thomson Licensing Corporation

    发明人： Romesburg, Eric Douglas ,  Fling, Russell Thomas

    IPC分类号： H04N5/12

    CPC分类号： H04N5/123 ,  H04N9/45 ,  H04N9/64

    摘要： A digital TV receiver includes an apparatus for generating a skew corrected clock. The apparatus consists of a fixed frequency, free running oscillator (22) for producing a signal (FFOS) having a frequency which is a fixed integer multiple K of the desired nominal frequency of the skew-corrected clock signal, and a divide-by-K circuit (30) which is reset once every horizontal line. The divide-by-K circuit comprises a divide-by-m circuit connected in series with a flip-flop (50), with said divide-by-m circuit (40) being reset by a first control signal (FCS) once every horizontal line. The apparatus additionally includes means (Fig. 2/SCS) for preventing the output of the flip-flop (50) from changing while the divide-by-m circuit is reset in response to the first control signal (FCS). In accordance with another aspect of this invention, the state of the divide-by-K circuit (30) is captured (150/SES) and saved for use in a chroma demodulation apparatus (Fig. 6) just before it is reset.

    摘要翻译： 数字电视接收机包括用于产生偏斜校正时钟的装置。 该装置包括一个固定频率的自由运行振荡器（22），用于产生一个信号（FFOS），该信号的频率是偏斜校正时钟信号的期望额定频率的固定整数倍K， K电路（30），每水平线复位一次。 除以K电路包括与触发器（50）串联连接的除以m电路，所述除法电路（40）由第一控制信号（FCS）每一次复位 水平线。 该装置还包括用于在响应于第一控制信号（FCS）复位除数电路时防止触发器（50）的输出改变的装置（图2 / SCS）。 根据本发明的另一方面，在除了K电路（30）被复位之前捕获（150 / SES）并保存用于色度解调装置（图6）中的状态。