Circuit for removing jitter of chrominance signal and television set using the same
    2.
    发明公开
    Circuit for removing jitter of chrominance signal and television set using the same 失效
    用于移除使用其的色度信号和电视机的电路

    公开(公告)号:EP0421434A3

    公开(公告)日:1992-08-12

    申请号:EP90119073.6

    申请日:1990-10-04

    IPC分类号: H04N9/89 H04N9/83

    CPC分类号: H04N9/898 H04N9/83

    摘要: A frequency of a chrominance signal including a jitter component and separated from a color video signal is converted from a first frequency to a second frequency by first frequency converting means (51). Then, the chrominance signal which frequency is converted to the second frequency is converted to have the original frequency by second frequency converting means (52). The first frequency converting means and the second frequency converting means both includes a multiplier (51a,52a) and a bandpass filter (51b,52b). One multiplier of the first or the second frequency converting means receives a frequency signal corresponding to a phase difference between a reference frequency signal and a color burst signal separated from the chrominance signal. As a result, the jitter component is removed from the chrominance signal either in the first or the second frequency converting means. In the first and the second frequency converting means the input signal and the output signal so widely differ from each other in frequency that the respective frequency components included in the output signal of the multipliers in the respective frequency converting means expend widely along an axis of a frequency. As a result, the bandpass filter in each frequency converting means is enabled to easily extract only a signal of a desired frequency component.

    Phase synchronizing circuit in video signal receiver and method of establishing phase synchronization
    3.
    发明公开
    Phase synchronizing circuit in video signal receiver and method of establishing phase synchronization 失效
    视频信号接收机中的相位同步电路和建立相位同步的方法

    公开(公告)号:EP0357080A3

    公开(公告)日:1990-11-07

    申请号:EP89116190.3

    申请日:1989-09-01

    IPC分类号: H04N5/12

    CPC分类号: H04N5/126 H03L7/113

    摘要: A circuit for providing a signal phase locked to a horizontal synchronization signal included in a received video signal includes a first PLL loop (16, 44, 46; 16, 46′, 204) and a second PLL or AFC loop (26, 44, 46; 26, 44, 46′, 204). The first PLL loop has a plurality of lock ranges. The second PLL or AFC loop, which has an output characteristic with a single S curve, has one lock range large in width. The second PLL or AFC loop is supplied with a horizontal synchronization signal separated in a synchronization separating circuit via a bandpass filter. The first PLL loop is directly supplied with a horizontal synchronization signal extracted in the synchronization separating circuit. The first PLL loop shares a voltage controlled oscillator (46; 46′) and a frequency divider (46; 204) with the second PLL loop or AFC loop. This phase synchronizing circuit further includes a circuit (48) for detecting synchronization/non-synchronization of an output of the frequency divider circuit with the horizontal synchronization signal separated/extracted in the synchronization separating circuit, and a switching circuit (42 for activating one of the first PLL loop and the second PLL or AFC loop in response to an output of this synchronization detector circuit.

    Synchronizing signal separating circuit
    4.
    发明公开
    Synchronizing signal separating circuit 失效
    Synchronisationssignal-Abtrennschaltung。

    公开(公告)号:EP0390183A2

    公开(公告)日:1990-10-03

    申请号:EP90106144.0

    申请日:1990-03-30

    IPC分类号: H04N5/08

    CPC分类号: H04N5/08

    摘要: A synchronizing signal separating circuit inverts and amplifies, in an inverter 12, a composite video signal received from a video amplifying circuit 100 through a coupling condenser 1. An output node B of the inverter 12 is connected to an input node A of the inverter 12 through a switch 14 and a bias resistor 10. A bias resistor 11 is connected between the input node A and a ground potential. An output of the inverter 12 is further inverted and amplified by an inverter 13 and outputted as a composite synchronizing signal and also supplied to a control input of the switch 14. As a result, the switch 14 is turned on in a synchronizing signal period, so that the coupling condenser 1 is charged with the output of the inverter 12 and also the electric charges of the coupling condenser 1 are discharged through the bias resistor 11 in other period than the synchronizing signal period. Therefore, irrespective of a APL of an inputted composite video signal, it is possible to maintain a level difference between a top level of the synchronizing signal and a separation level to be constant to correctly perform separation of the synchronization.

    摘要翻译: 同步信号分离电路通过耦合电容器1在反相器12中反转并放大从视频放大电路100接收的复合视频信号。反相器12的输出节点B连接到逆变器12的输入节点A 通过开关14和偏置电阻器10.偏置电阻器11连接在输入节点A和地电位之间。 反相器12的输出进一步由反相器13反相并放大,并作为复合同步信号输出,并且还提供给开关14的控制输入。结果,开关14在同步信号周期中导通, 使得耦合电容器1充电逆变器12的输出,并且耦合电容器1的电荷在同步信号周期的其他周期内通过偏置电阻器11放电。 因此,不管输入的复合视频信号的APL如何,可以将同步信号的顶层与分离电平之间的电平差保持为恒定,以正确地执行同步的分离。

    Apparatus for reducing noise in high-frequency band
    6.
    发明公开
    Apparatus for reducing noise in high-frequency band 失效
    Rauschverminderungsvorrichtung im Hochfrequenzband。

    公开(公告)号:EP0379210A2

    公开(公告)日:1990-07-25

    申请号:EP90101084.3

    申请日:1990-01-19

    IPC分类号: H04N5/93

    摘要: An apparatus for reducing noise in the high-frequency band is provided in the preceding stage of a limiter (8) with a high-frequency band correcting filter (12) for reducing a high-frequency band component of a reproduced RF signal from an optical disc. The reproduced RF signal has its high-frequency component lowered before entered into the limiter (18), reducing noise and beat components. As a result, a signal which is less influenced by the noise and beat and has good S/N can be obtained.

    摘要翻译: 在具有高频带校正滤波器(12)的限制器(8)的前级中提供用于降低来自光学器件的再现RF信号的高频带分量的用于降低高频带中的噪声的装置 光盘。 再现的RF信号在进入限幅器(18)之前具有降低的高频分量,从而降低噪声和拍频分量。 结果,可以获得受噪声和拍击影响较小并具有良好S / N的信号。

    Color synchronizing circuit
    7.
    发明公开
    Color synchronizing circuit 失效
    彩色同步电路

    公开(公告)号:EP0047994A2

    公开(公告)日:1982-03-24

    申请号:EP81107182.8

    申请日:1981-09-11

    发明人: Hosoya, Nobukazu

    IPC分类号: H04N9/45

    CPC分类号: H04N9/455

    摘要: A color synchronizing circuit comprises a phase locked loop which includes a voltage controlled oscillator including a ceramic vibrator. Phase comparison is made of an intermittent color burst and the output of the voltage controlled oscillator and the phase comparison output is applied to a low pass filter. The low pass filter provides a control voltage associated with the phase difference of these two signals to the voltage controlled oscillator. The frequency variable range Δf of the voltage controlled oscillator is selected such that a relation Af H is met with respect to the repetition frequency f H of the color burst. The low pass filter comprises a dual time constant circuit, which sufficiently attenuates a beat signal from the phase comparator, thereby to make narrow the pull-in range of the phase locked loop. On the other hand, a sawtooth waveform voltage of a stepwise fall is obtained from a sweeper circuit and is applied to the voltage controlled oscillator together with the output voltage from the low pass filter as a control voltage.

    摘要翻译: 一种彩色同步电路包括一个锁相环,该锁相环包括一个包括陶瓷振动器的压控振荡器。 相位比较由间歇色同步组成,压控振荡器的输出和相位比较输出应用于低通滤波器。 低通滤波器提供与这两个信号与压控振荡器的相位差相关的控制电压。 电压控制振荡器的频率可变范围Δf被选择为使得相对于色同步信号的重复频率fH满足关系Af <±fH。 低通滤波器包括双重时间常数电路,其充分衰减来自相位比较器的差拍信号,从而缩小锁相环的引入范围。 另一方面,从扫除电路获得阶梯状的锯齿波形电压,与来自低通滤波器的输出电压一起作为控制电压施加到压控振荡器。