摘要:
A frequency of a chrominance signal including a jitter component and separated from a color video signal is converted from a first frequency to a second frequency by first frequency converting means (51). Then, the chrominance signal which frequency is converted to the second frequency is converted to have the original frequency by second frequency converting means (52). The first frequency converting means and the second frequency converting means both includes a multiplier (51a,52a) and a bandpass filter (51b,52b). One multiplier of the first or the second frequency converting means receives a frequency signal corresponding to a phase difference between a reference frequency signal and a color burst signal separated from the chrominance signal. As a result, the jitter component is removed from the chrominance signal either in the first or the second frequency converting means. In the first and the second frequency converting means the input signal and the output signal so widely differ from each other in frequency that the respective frequency components included in the output signal of the multipliers in the respective frequency converting means expend widely along an axis of a frequency. As a result, the bandpass filter in each frequency converting means is enabled to easily extract only a signal of a desired frequency component.
摘要:
A circuit for providing a signal phase locked to a horizontal synchronization signal included in a received video signal includes a first PLL loop (16, 44, 46; 16, 46′, 204) and a second PLL or AFC loop (26, 44, 46; 26, 44, 46′, 204). The first PLL loop has a plurality of lock ranges. The second PLL or AFC loop, which has an output characteristic with a single S curve, has one lock range large in width. The second PLL or AFC loop is supplied with a horizontal synchronization signal separated in a synchronization separating circuit via a bandpass filter. The first PLL loop is directly supplied with a horizontal synchronization signal extracted in the synchronization separating circuit. The first PLL loop shares a voltage controlled oscillator (46; 46′) and a frequency divider (46; 204) with the second PLL loop or AFC loop. This phase synchronizing circuit further includes a circuit (48) for detecting synchronization/non-synchronization of an output of the frequency divider circuit with the horizontal synchronization signal separated/extracted in the synchronization separating circuit, and a switching circuit (42 for activating one of the first PLL loop and the second PLL or AFC loop in response to an output of this synchronization detector circuit.
摘要:
A synchronizing signal separating circuit inverts and amplifies, in an inverter 12, a composite video signal received from a video amplifying circuit 100 through a coupling condenser 1. An output node B of the inverter 12 is connected to an input node A of the inverter 12 through a switch 14 and a bias resistor 10. A bias resistor 11 is connected between the input node A and a ground potential. An output of the inverter 12 is further inverted and amplified by an inverter 13 and outputted as a composite synchronizing signal and also supplied to a control input of the switch 14. As a result, the switch 14 is turned on in a synchronizing signal period, so that the coupling condenser 1 is charged with the output of the inverter 12 and also the electric charges of the coupling condenser 1 are discharged through the bias resistor 11 in other period than the synchronizing signal period. Therefore, irrespective of a APL of an inputted composite video signal, it is possible to maintain a level difference between a top level of the synchronizing signal and a separation level to be constant to correctly perform separation of the synchronization.
摘要:
An apparatus for reducing noise in the high-frequency band is provided in the preceding stage of a limiter (8) with a high-frequency band correcting filter (12) for reducing a high-frequency band component of a reproduced RF signal from an optical disc. The reproduced RF signal has its high-frequency component lowered before entered into the limiter (18), reducing noise and beat components. As a result, a signal which is less influenced by the noise and beat and has good S/N can be obtained.
摘要:
A color synchronizing circuit comprises a phase locked loop which includes a voltage controlled oscillator including a ceramic vibrator. Phase comparison is made of an intermittent color burst and the output of the voltage controlled oscillator and the phase comparison output is applied to a low pass filter. The low pass filter provides a control voltage associated with the phase difference of these two signals to the voltage controlled oscillator. The frequency variable range Δf of the voltage controlled oscillator is selected such that a relation Af H is met with respect to the repetition frequency f H of the color burst. The low pass filter comprises a dual time constant circuit, which sufficiently attenuates a beat signal from the phase comparator, thereby to make narrow the pull-in range of the phase locked loop. On the other hand, a sawtooth waveform voltage of a stepwise fall is obtained from a sweeper circuit and is applied to the voltage controlled oscillator together with the output voltage from the low pass filter as a control voltage.