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公开(公告)号：EP1508173B1
公开(公告)日：2006-10-18
申请号：EP03730096.9
申请日：2003-05-22
发明人： HEHEMANN, Ingo , KEMNA, Armin
IPC分类号： H01L31/101 , H01L31/0352 , H01L27/146
CPC分类号： H01L27/1463 , H01L27/14643 , H01L31/035281 , H01L31/103 , Y02E10/50 , Y10S257/927
摘要： Disclosed is a photodiode comprising a semiconductor substrate (12) that is provided with a photosensitive area (18, 24) which encompasses a space charge region (18) generating a portion of a diffusion current and a diffusion region (24) generating another portion of a diffusion current, and an insulating device (20) which at least partly delimits the diffusion region relative to an adjacent surrounding area of the semiconductor substrate. In order to lower the reduction in the photodiode bandwidth caused by the diffusion current blurring the response of the photodiode, the semiconductor substrate is provided with an insulating device which delimits the diffusion region relative to the surrounding semiconductor substrate, thereby reducing the number of charge carriers that contribute to the diffusion rate because the diffusion region in which the diffusing charge carriers are produced is reduced and because the diffusing charge carriers produced in the reduced diffusion region are sucked up by the insulating device such that said diffusing charge carriers do not contribute to the photocurrent.
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公开(公告)号：EP0915521A2
公开(公告)日：1999-05-12
申请号：EP98120973.7
申请日：1998-11-05
申请人： HARRIS CORPORATION
发明人： Neilson, John
IPC分类号： H01L29/78 , H01L29/06 , H01L21/336
CPC分类号： H01L29/7802 , H01L29/0623 , H01L29/0634 , H01L29/1095 , Y10S257/927
摘要： A high voltage MOSFET with low on-resistance and a method of lowering the on-resistance for a specific device breakdown voltage of a high voltage MOSFET. The MOSFET includes a blocking layer (16) of a first conductivity type having vertical sections of a second conductivity type or the blocking layer may include alternating vertical sections of a first and second conductivity type.
摘要翻译： 具有低导通电阻的高压MOSFET以及针对高压MOSFET的特定器件击穿电压降低导通电阻的方法。 MOSFET包括具有第二导电类型的垂直部分的第一导电类型的阻挡层（16），或者阻挡层可以包括第一导电类型和第二导电类型的交替垂直部分。
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公开(公告)号：EP1739756B1
公开(公告)日：2018-10-24
申请号：EP06021766.8
申请日：2003-05-22
发明人： Hehemann, Ingo , Kemna, Armin
IPC分类号： H01L31/101 , H01L31/0352 , H01L27/144 , H01L27/146
CPC分类号： H01L27/1463 , H01L27/14643 , H01L31/035281 , H01L31/103 , Y02E10/50 , Y10S257/927
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公开(公告)号：EP0631320B1
公开(公告)日：1998-11-04
申请号：EP94109691.9
申请日：1994-06-23
申请人： MOTOROLA, INC.
发明人： Tu, Shang-Hui
IPC分类号： H01L29/06
CPC分类号： H01L29/0619 , Y10S257/927
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公开(公告)号：EP0087979A2
公开(公告)日：1983-09-07
申请号：EP83301104.2
申请日：1983-03-02
申请人： FUJITSU LIMITED
发明人： Aoyama, Keizo , Yamauchi, Takahiko , Seki, Teruo
CPC分类号： G11C5/063 , G11C5/005 , G11C5/14 , G11C11/4125 , H01L23/556 , H01L27/1112 , H01L2924/0002 , Y10S257/927 , H01L2924/00
摘要： A static-type semiconductor memory device having a three-layer structure; the gate-electrode wiring lines being formed by a first conductive layer of, for example, polycrystalline silicon; the word lines, the ground lines, and the power supply lines being formed by a second conductive layer of, for example, aluminum; and the bit lines being formed by a third conductive layer of, for example, aluminum; the bit lines extending in a column direction, and the ground lines extending in a row direction; whereby an improved integration degree, an improved operating speed, an improved manufacturing yield, and a countermeasure for soft errors due to alpha particles are attained.
摘要翻译： 一种具有三层结构的静态型半导体存储器件; 栅电极布线由例如多晶硅的第一导电层形成; 字线，地线和电源线由例如铝的第二导电层形成; 并且位线由例如铝的第三导电层形成; 位线沿列方向延伸，地线沿行方向延伸; 由此获得改进的集成度，改进的操作速度，改进的制造良率以及由α粒子引起的软误差的对策。
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6.发明授权
公开(公告)号：EP0974165B1
公开(公告)日：2009-03-25
申请号：EP99900615.8
申请日：1999-01-28
申请人： NXP B.V.
IPC分类号： H01L29/732
CPC分类号： H01L29/1004 , H01L29/7322 , Y10S257/927 , Y10S257/928
摘要： The invention relates to a semiconductor device comprising a preferably discrete bipolar transistor with a collector region (1), a base region (2), and an emitter region (3) which are provided with connection conductors (6, 7, 8). A known means of preventing a saturation of the transistor is that the latter is provided with a Schottky clamping diode. The latter is formed in that case in that the connection conductor (7) of the base region (2) is also put into contact with the collector region (1). In a device according to the invention, the second connection conductor (7) is exclusively connected to the base region (2), and a partial region (2B) of that portion (2A) of the base region (2) which lies outside the emitter region (3) and comprises a smaller flux of dopant atoms. The bipolar transistor in a device according to the invention is provided with a pn clamping diode which is formed between the partial region (2B) and the collector region (1). Such a device has excellent properties, such as a short switching time (ts) and a saturation collector-emitter voltage (VCEsat) which is not too high, while having a low, non-variable and well reproducible leakage current, unlike the known device. In a favourable modification, a region (4) provided simultaneously with the emitter region (3) is present between the partial region (2B) and the second connection conductor (7).
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7.发明公开
公开(公告)号：EP0974165A2
公开(公告)日：2000-01-26
申请号：EP99900615.8
申请日：1999-01-28
IPC分类号： H01L29/732
CPC分类号： H01L29/1004 , H01L29/7322 , Y10S257/927 , Y10S257/928
摘要： The invention relates to a semiconductor device comprising a preferably discrete bipolar transistor with a collector region (1), a base region (2), and an emitter region (3) which are provided with connection conductors (6, 7, 8). A known means of preventing a saturation of the transistor is that the latter is provided with a Schottky clamping diode. The latter is formed in that case in that the connection conductor (7) of the base region (2) is also put into contact with the collector region (1). In a device according to the invention, the second connection conductor (7) is exclusively connected to the base region (2), and a partial region (2B) of that portion (2A) of the base region (2) which lies outside the emitter region (3) and comprises a smaller flux of dopant atoms. The bipolar transistor in a device according to the invention is provided with a pn clamping diode which is formed between the partial region (2B) and the collector region (1). Such a device has excellent properties, such as a short switching time (ts) and a saturation collector-emitter voltage (VCEsat) which is not too high, while having a low, non-variable and well reproducible leakage current, unlike the known device. In a favourable modification, a region (4) provided simultaneously with the emitter region (3) is present between the partial region (2B) and the second connection conductor (7).
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8.发明公开semiconductor device having a high voltage termination structure with buried field-shaping region 失效Halbleiteranordnung mit Hochspannungsrandsruktur mit vergrabenem Feldformungsgebiet
公开(公告)号：EP0851505A2
公开(公告)日：1998-07-01
申请号：EP97310073.8
申请日：1997-12-12
IPC分类号： H01L29/06
CPC分类号： H01L29/7802 , H01L29/0615 , H01L29/0619 , H01L29/0623 , Y10S257/927
摘要： A semiconductor device structure and method are presented for increasing a breakdown voltage of a junction between a substrate of first conductivity type and a device region. The structure includes a region of second conductivity type in the substrate completely buried in the substrate below and separated from the device region. The region of second conductivity type is located a predetermined distance away from the device region. The distance is sufficient to permit a depletion region to form between the region of second conductivity type and the device region, when a first voltage is applied between the device region and the substrate. The distance also is determined to produce a radius of curvature of the depletion region, when a second voltage that is larger than the first voltage is applied between the device region and the substrate, that is larger than a radius of curvature of the depletion region about the device region that would be formed if the region of second conductivity type were not present. Traditional field shaping regions spaced from the device region at a surface of the substrate and spaced from the region of second conductivity type may be used in conjunction with the buried ring, if desired..
摘要翻译： 提出了一种用于增加第一导电类型的衬底（92,94）与器件区域（96）之间的结的击穿电压的半导体器件结构（90,90'）和方法。 该结构包括在衬底中完全埋入衬底中的第二导电类型（104）的区域，并且与器件区域分离。 第二导电类型的区域位于远离装置区域的预定距离处。 当在器件区域和衬底之间施加第一电压（108）时，该距离足以允许在第二导电类型的区域和器件区域之间形成耗尽区域（106）。 当在器件区域和衬底之间施加大于第一电压的第二电压（108'）时，确定该距离以产生耗尽区的曲率半径（110,110'），该第二电压（108'）大于 如果不存在第二导电类型的区域，则围绕将形成的器件区域的耗尽区的曲率半径。 如果需要，可以与掩埋环一起使用与衬底的表面处的器件区域间隔开并与第二导电类型的区域隔开的传统场成形区域（115）。
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公开(公告)号：EP0520448A1
公开(公告)日：1992-12-30
申请号：EP92110735.5
申请日：1992-06-25
CPC分类号： G02F1/136286 , G02F2001/13629 , H01L27/12 , Y10S257/927
摘要： An insulating substrate (11) has thin film transistors (13), and scanning and data wires (14, 18) for supplying signals to the transistors. Each of the wires (14, 18) has a two-layered structure comprising a lower metal film (14a, 18a) and an upper metal film (14b, 18b). Oxide films (a,c) serving as etching stopper films and having a width smaller than each of the lower and upper metal films are interposed between the lower and upper metal films over the entire length thereof.
摘要翻译： 绝缘基板（11）具有薄膜晶体管（13）和用于向晶体管提供信号的扫描和数据线（14,18）。 每个电线（14,18）具有包括下金属膜（14a，18a）和上金属膜（14b，18b）的双层结构。 用作蚀刻阻挡膜并且具有小于下金属膜和上金属膜的宽度的氧化物膜（a，c）在其整个长度上插入在下金属膜和上金属膜之间。
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公开(公告)号：EP0133023B1
公开(公告)日：1990-06-13
申请号：EP84305083.2
申请日：1984-07-26
申请人： HITACHI, LTD.
CPC分类号： H01L27/112 , H01L23/528 , H01L2924/0002 , Y10S257/927 , H01L2924/00
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