Abstract:
An apparatus includes a semiconductor package, a radio receiver and a processor. The radio receiver is located in the semiconductor package and includes at least one gain stage. The processor is located in the semiconductor package to execute stored instructions to control the gain stage(s).
Abstract:
A low noise amplifier (500) includes a first transconductance device (326) having a control electrode for receiving a first input signal, and a first current electrode; a first load device (322) having a first terminal coupled to a first power supply voltage terminal and a second terminal coupled to the first current electrode of the first transconductance device (326) and forming a first output voltage signal; a second transconductance device (336) having a control electrode for receiving a second input signal, and a second current electrode; a second load device (332) having a first terminal coupled to the first power supply voltage terminal and a second terminal coupled to the first current electrode of the second transconductance device (336) and forming a second output voltage signal; and an attenuation device (340) coupled between the first current electrodes of the first (326) and second (336) transconductance devices and having a control input terminal for receiving a control voltage thereon.
Abstract:
A clock synthesis circuit includes a delta sigma modulator that receives a divide ratio and generates an integer portion and a digital quantization error (a fractional portion). A fractional-N divider divides a received signal according to a divide control value corresponding to the integer portion and generates a divided signal. A phase interpolator adjusts a phase of the divided signal according to the digital quantization error to thereby reduce noise associated with the fractional-N divider.
Abstract:
A method in a modem having a frame having a plurality of slots, for determining whether incoming DIL sequence information contains A-law or mu-law is provided. From the DIL sequence information, an ordered table of levels for each slot is generated. The levels of all non-robbed-bit slots are averaged, and average levels are subjected to an A-law/mu-law separation function. The separation function F1(n1,n2)=sum from i=n1 to i=n2 {L(i) - 2* [L(i-16]} effectively compares values of a first plurality of levels L(i) to twice the values of a second plurality of levels sixteen levels removed from the first plurality of levels (420). The sum is compared to a threshold (430), as the sum will be small for A-law values and large for mu-law values.
Abstract:
In one embodiment, the present invention includes an apparatus for permitting diagnostic testing of a wireless device. The apparatus may include a first switch to route diagnostic information or acoustic information received from a processor of the device, a codec coupled to the first switch to code the routed diagnostic information or acoustic information, and a second switch coupled to the codec to route the coded diagnostic information to a first port of the wireless device and to route the coded acoustic information to the first port or a second port of the wireless device.
Abstract:
An apparatus includes switches (126), a bank of capacitors (122) and an oscillator core (120). The oscillator core (120) is selectively coupled to the bank of capacitors (122) by the switches (126), and the oscillator core (120) provides a signal that has a frequency that is dependent on the selective coupling between the bank of capacitors (122) and the oscillator core (120). The apparatus also includes a circuit (300) that is adapted to change the coupling between the bank of capacitors (122) and the oscillator core (120) to change the frequency and impose a rate limit at which the frequency changes to avoid a significant glitch in the signal.
Abstract:
A method of operating a radio-frequency (RF) circuitry and a signal-processing circuitry in a mobile telephone apparatus includes at least partially disabling the signal-processing circuitry while transmitting or receiving signals. In one example, a processor is efficiently disabled by generating and servicing an interrupt of relatively high priority. One advantage of this example is that preexisting, legacy code can be maintained, while still achieving the desired objectives. The processor can be enabled by generating and servicing a second high priority interrupt.
Abstract:
A communication apparatus includes a radio frequency circuit that operates on a radio frequency signal and a digital processing circuit coupled to the radio frequency circuit. The digital processing circuit includes a first timing circuit that provides timed signals to control timing of system operations during an active mode of operation of the digital processing circuit, and a second timing circuit that provides timing signals to control timing of system operations during an active mode of operation of the radio frequency circuit. In one particular embodiment, at least a portion of the first timing circuit is disabled when the radio frequency circuit is active (receiving and/or transmitting).
Abstract:
A metal mesh structure for use in an integrated circuit is described. In one embodiment, a semiconductor integrated circuit includes a first region including, for example, a device layer having one or more active semiconductor devices. The circuit also includes a second region, which may include a metalization layer including circuit wires. The circuit further includes a layer of metal mesh interposed between the first and second regions, and which may be implemented on at least a portion of another metalization layer.
Abstract:
A low noise amplifier (500) includes a first transconductance device (326) having a control electrode for receiving a first input signal, and a first current electrode; a first load device (322) having a first terminal coupled to a first power supply voltage terminal and a second terminal coupled to the first current electrode of the first transconductance device (326) and forming a first output voltage signal; a second transconductance device (336) having a control electrode for receiving a second input signal, and a second current electrode; a second load device (332) having a first terminal coupled to the first power supply voltage terminal and a second terminal coupled to the first current electrode of the second transconductance device (336) and forming a second output voltage signal; and an attenuation device (340) coupled between the first current electrodes of the first (326) and second (336) transconductance devices and having a control input terminal for receiving a control voltage thereon.