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    INTEGRATED CIRCUIT HAVING AN IN-SITU CIRCUIT FOR DETECTING AN IMPENDING CIRCUIT FAILURE
    7.
    发明公开
    INTEGRATED CIRCUIT HAVING AN IN-SITU CIRCUIT FOR DETECTING AN IMPENDING CIRCUIT FAILURE 审中-公开

    公开(公告)号：EP4220205A1

    公开(公告)日：2023-08-02

    申请号：EP23153268.0

    申请日：2023-01-25

    申请人： NXP USA, Inc.

    发明人： Jarrar, Anis Mahmoud ,  Tipple, David Russell ,  Onyema, Emmanuel Chukwuma

    IPC分类号： G01R31/317 ,  G01R31/30

    摘要： Method and integrated circuit for indicating a failure of a critical path. The integrated circuit comprising: 1) a critical data path including a flip flop configured to receive a data input and provide a latched data output; and 2) a monitoring circuit including a delay generator configured to receive the data input and provide a plurality of delayed data outputs corresponding to delayed versions of the data input with increasing amounts of delay, a selector circuit configured to select one of the plurality of delayed outputs based on a programmable control value, a shadow latch coupled to an output of the selector circuit and configured to latch a value at its input to provide as a latched shadow output, a comparator circuit configured to provide a match error indicator based on a comparison between the first latched data output and the latched shadow output, a metastability detection circuit, and an error indicator configured to indicate a failure of the critical data path.