摘要:
A communications adaptor comprises a receiver circuit, which can comprise a signal input configured to receive a frequency shift keyed (FSK) signal; a delay circuit in communication with the signal input and including a delayed signal output; a multiplier circuit in communication with the signal input and the delayed signal output, and the multiplier circuit can be configured to produce a serial bit steam from at least the signal input and the delayed signal output, the serial bit stream corresponds to one or more bits encoded with frequency shift keying in the FSK signal; and a signal output configured to output the serial bit stream. The communications adaptor also can comprise a transmitter circuit and a processor in communication with the receiver circuit and the transmitter circuit.
摘要:
The invention is directed to a method and system for supporting wireless RF services over a wired digital data network infrastructure, such as an Ethernet network. The system includes a control unit that can be connected to a base station that supports one or more wireless RF services. The control unit converts the wireless RF signals to an intermediate frequency (IF) that does not interfere with the data network signals and combines the IF signals onto the cable run to a remote network device on the digital data network. The remote network device includes a multiplexer or a low pass filter and a high pass filter that separates the IF signals from the digital data signals on the downlink and combines the IF signals with digital data signals on the uplink over the cable run. The IF signals can be input to an RF module connected to the remote network device which converts the IF signals back to the original RF signals for transmission by a transceiver to wireless devices. Similarly, on the uplink, RF signals received from the wireless devices through the transceiver can be converted to IF for transmission over the cable run to the base station. In one conventional data network each cable run includes 4 pair of conductors and each pair can be used to carry a different IF frequency band. In addition, each pair can be configured to carry more than one IF frequency band using FDD or TDD. Additional signaling channels, such as for management signaling can be provided using differential signaling between 2 pair of conductors. The filters can be implemented using various technologies, including silicon, LTCC and discrete components and active filters can be provided to allow for configuring and tuning of performance in the field.
摘要:
A receiver may be operable to receive a QAM-based, inter- symbol correlated (ISC) signal at a signal-to-noise ratio of between 29 dB and 31dB and process the QAM- based, ISC signal to output estimated symbols at a symbol error rate of between 2x10 -1 and 1x10 -3 . The QAM-based, ISC signal may be a partial response signal generated by passing a first signal through a partial response pulse shaping filter. The partial response pulse shaping filter may provide greater capacity than a capacity achieved by passing the first signal through a root-raised-cosine-based pulse shaping filter. The receiver may comprises an input filter, and the processing of the QAM-based, ISC signal may comprises filtering the QAM-based, ISC signal via a filter configured to achieve a desired total partial response in combination with the partial response pulse shaping filter.
摘要:
The disclosed embodiments relate to a digital radio frequency (RF) circuit (100) that creates a signal in a desired range in a frequency spectrum. The RF circuit (100) comprises circuitry (104) that produces a first sample data modulated signal (105) having a first frequency and a first sample data clock rate. An up-sampler modulator (108) receives the first sample data modulated signal and produces a second sample data modulated signal (109) having a second frequency and a second sample data clock rate. The RF circuit (100) may also comprise circuitry (112) that receives the first sample data modulated signal and the second sample data modulated signal and delivers one of the first sample data modulated signal (105) and the second sample data modulated signal (109) for further processing depending on which sample data modulated signal exhibits desirable characteristics for a given operating environment.
摘要:
A pulse amplitude modulated (PAM) mapper (36) includes a constellation matrix memory (40) string indicating of a plurality of different constellations. The constellations are used individually or together to support a plurality of different modem data rates. The mapper (36) also includes a logic block (60), a constellation controller (65), a PAM code generation block (68), and an output register (75). The logic block receives incoming bits and groups the bits as a function of the desired or agreed upon bit rate as indicated by the constellation controller (65), and provides a plurality of each group of bits to the PAM code generation block (68), and one or more sign bits to the output register (75).
摘要:
A method of receiving an FM digital audio broadcasting signal including a first plurality of sub-carriers in a lower sideband of the radio channel comprises the steps of mixing the digital audio broadcasting signal with a local oscillator signal (112) to produce an intermediate frequency signal (114) through a bandpass filter (116) to produce a filter signal, determining if one of the upper and lower sidebands of the digital audio broadcasting signal is corrupted, and adjusting the local frequency oscillator signal (112) to change the frequency of the intermediate frequency (114) signal such that the bandpass filter (116) removes the sub-carriers in the upper or lower sideband that has been corrupted. A receiver that processes a digital audio broadcasting signal in accordance with the method is also provided.
摘要:
A digital demodulator for differential phase shift keyed ( PSK) signals (154) includes two pairs of 1-bit integrators (105, 106 and 107, 108) for continuously taking the phase difference between successive DPSK bits. Each DPSK bit is subdivided (100) into a plurality of bits, for example 15 bits. A weighted output signal having 4 bits is provided by each 1-bit integrator for each of the bits corresponding to a DPSK bit. The weighted output signals from each pair of 1-bit integrators are sine weighted and multiplied (118). The products are then added (120) together for application to a comparator (121). The comparator (121) compares the sum of the addition to a predetermined reference signal and provides a demodulated digital signal (155) having a logical state dependent on whether the sum is greater or smaller than the predetermined reference.
摘要:
A method and apparatus for correcting the phase and gain of data associated with a constellation pattern of a plurality of received individual symbols. Each symbol is divided into real and imaginary symbol components. The signs of the real and imaginary symbol components of each symbol are determined and used as a basis for determining wheiher the symbol is associated with a or third quadrant of the constellation pattern or a second or fourth quadrant of the constellation pattern. The absolute values of the real and imaginary symbol components are determined and used to create a first sum and a second sum. A phase adjustment value θ and a gain adjustment value G are derived from the first and second sums, and are used to create a complex number. Each of the received individual symbols is multiplied by the created complex number to provide corrected constellation pattern data.