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公开(公告)号：EP1303146A1
公开(公告)日：2003-04-16
申请号：EP01984381.2
申请日：2001-07-23
发明人： NISHIO, Toshiro , NIO, Yutaka
CPC分类号： H04N19/00533 , H04N11/042 , H04N19/44
摘要： A signal transmission system according to the present invention comprises: a signal transmission unit (101) that includes a MPEG decoder (101) which receives digital broadcasting and outputs a luminance signal Y and two color difference signals P B /P R , and a transmission path encoding circuit (103) which encodes the YP B P R outputted from the MPEGU decoder (102) into signals in the forms suited to a transmission path and transmits the encoded signals; and a signal reception unit (104) that includes a transmission path decoding circuit (105) which receives the encoded YP B P R and decodes them, a Y processing circuit (106) which processes the decoded luminance signal Y, a chrominance processing circuit (107) which processes the respective decoded color difference signals P B /P R , a signal conversion circuit (108) which converts the YP B P R outputted from the Y processing circuit (106) and the chrominance processing circuit (107) into RGB signals, and a display device (108) which displays the RGB signals.
According to the so-configured signal transmission system, it is possible to realize a signal transmission system in which hardware configurations of the video signal transmitting end and receiving end can be simplified.-
公开(公告)号：EP0532672A4
公开(公告)日：1993-12-22
申请号：EP91912249
申请日：1991-05-29
IPC分类号： H04N5/46 , G06F3/00 , G06T3/40 , G09G5/00 , G09G5/14 , G09G5/377 , G09G5/391 , H04N3/223 , H04N3/227 , H04N3/27 , H04N5/073 , H04N5/14 , H04N5/262 , H04N5/265 , H04N5/44 , H04N5/45 , H04N7/00 , H04N7/01 , H04N7/015 , H04N7/26 , H04N9/64 , H04N11/06 , H04N11/20 , H04N11/24 , H04N7/18
CPC分类号： H04N9/641 , G06T3/0012 , G06T3/4007 , H04N3/223 , H04N3/227 , H04N3/27 , H04N5/2624 , H04N5/45 , H04N7/007 , H04N7/01 , H04N7/0105 , H04N7/0122 , H04N7/015 , H04N9/64 , H04N19/90
摘要： A video display system comprises analog to digital converters (342, 346) for quantizing first and second video signals, representing first and second pictures respectively, at higher and lower levels of quantization resolution relative to one another. The analog to digital converters (342, 346) can operate at different sampling rates. The picture represented in the lower sampling rate signal can have the appearance of being subsampled, relative to the other picture. A video display is synchronized with the first video signal. The second video signal is synchronized with the first video signal. A signal processing circuit modifies the first and second video signals to represent the first and second pictures respectively in sizes smaller than the video display. A multiplexing circuit (300) combines the processed video signals for side-by-side display of said pictures. A quantization resolution enhancing circuit improves the perceived quality of the video signal having the lower level of quantization resolution.
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公开(公告)号：EP0532711A4
公开(公告)日：1993-12-15
申请号：EP91921006
申请日：1991-05-29
IPC分类号： H04N5/46 , G06F3/00 , G06T3/40 , G09G5/00 , G09G5/14 , G09G5/377 , G09G5/391 , H04N3/223 , H04N3/227 , H04N3/27 , H04N5/073 , H04N5/14 , H04N5/262 , H04N5/265 , H04N5/44 , H04N5/45 , H04N7/00 , H04N7/01 , H04N7/015 , H04N7/26 , H04N9/64 , H04N11/06 , H04N11/20 , H04N11/24
CPC分类号： H04N9/641 , G06T3/0012 , G06T3/4007 , H04N3/223 , H04N3/227 , H04N3/27 , H04N5/2624 , H04N5/45 , H04N7/007 , H04N7/01 , H04N7/0105 , H04N7/0122 , H04N7/015 , H04N9/64 , H04N19/90
摘要： The perceived quality of a dithered or dithered/dedithered video signal can be improved under some circumstances by skewing the dither sequence. The dither sequence, whether a 1-bit or 2-bit sequence, repeats continuously on a given line but is phase shifted on different lines. Many possible skewing schemes are possible. Two skewing sequences can be particularly advantageous in hiding artifacts in the display due to the dithering process itself. One and two pixel, field to field skews are those in which all the lines of one field have the same phase and all the lines of the next field are skewed one or two pixels with respect to the first field. The field to field skews on 2-bit dithered signals work best for frozen pictures. Some line structure can be visible during live video, where there are flat areas in motion. The one pixel skew is particularly advantageous for 2-bit dithers if the signal will be dedithered, but the two pixel skew is particularly advantageous if the signal will not be dithered. Whether or not the signal should be dedithered depends upon the display format.
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公开(公告)号：EP0532676A4
公开(公告)日：1993-11-24
申请号：EP91912342
申请日：1991-05-30
IPC分类号： H04N5/46 , G06F3/00 , G06T3/40 , G09G5/00 , G09G5/14 , G09G5/377 , G09G5/391 , H04N3/223 , H04N3/227 , H04N3/27 , H04N5/073 , H04N5/14 , H04N5/262 , H04N5/265 , H04N5/44 , H04N5/45 , H04N7/00 , H04N7/01 , H04N7/015 , H04N7/26 , H04N9/64 , H04N11/06 , H04N11/20 , H04N11/24
CPC分类号： H04N9/641 , G06T3/0012 , G06T3/4007 , H04N3/223 , H04N3/227 , H04N3/27 , H04N5/2624 , H04N5/45 , H04N7/007 , H04N7/01 , H04N7/0105 , H04N7/0122 , H04N7/015 , H04N9/64 , H04N19/90
摘要： A picture overlay system assures proper image aspect ratios for picture overlays. The system comprises a video memory (350, 356, 358) and a control unit (300) for writing and reading information from a video signal into and out of the video memory, the information relating to video data. A reading circuit (680) supplies information from the video memory synchronously with a display for another video signal. An interpolar (337) selectively compresses and expands the information read from the reading circuit, independently of any other processing which might vertically compress or expand said video data. A multiplexer (312) combines the video signals for simultaneous display. The reading circuit can comprise an asynchronous line memory for the information read from the video memory, having a write port operable synchronously with the reading of the video memory and a read port operable synchronously with the display of the other video signal.
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公开(公告)号：EP0532583A4
公开(公告)日：1993-11-24
申请号：EP91910567
申请日：1991-05-29
发明人： FILLIMAN, PAUL, DEAN , ERSOZ, NATHANIEL, HALUK , SAEGER, TIMOTHY, WILLIAM , DUFFIELD, DAVID, JAY , HORLANDER, KARL, FRANCIS
IPC分类号： H04N5/46 , G06F3/00 , G06T3/40 , G09G5/00 , G09G5/14 , G09G5/377 , G09G5/391 , H04N3/223 , H04N3/227 , H04N3/27 , H04N5/073 , H04N5/14 , H04N5/262 , H04N5/265 , H04N5/44 , H04N5/45 , H04N7/00 , H04N7/01 , H04N7/015 , H04N7/26 , H04N9/64 , H04N11/06 , H04N11/20 , H04N11/24 , H04N5/68
CPC分类号： H04N9/641 , G06T3/0012 , G06T3/4007 , H04N3/223 , H04N3/227 , H04N3/27 , H04N5/2624 , H04N5/45 , H04N7/007 , H04N7/01 , H04N7/0105 , H04N7/0122 , H04N7/015 , H04N9/64 , H04N19/90
摘要： A video control system comprises a deflection system having a dimensionally adjustable raster, a circuit (1032) for detecting a letterbox video signal source and a circuit (50) for dimensionally controlling the raster of the deflection system responsive to the detecting circuit. The detecting circuit and the control circuit are operable automatically. The detection circuit can comprise a circuit (1000) for measuring video luma levels of the video signal source in at least two regions (A, C) of each video field and a circuit for comparing the luma levels from each of the regions to respective threshold levels. In an alternative, the detection circuit (1010) comprises a circuit (1020, 1022) for comparing respective minimum and maximum luminance values for a plurality of successive video lines, a circuit (1024) for storing minimum and maximum luminance values for the plurality of video lines, a circuit for generating gradients indicative of the stored values and a circuit for comparing the gradients to threshold values.
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公开(公告)号：EP0100678B1
公开(公告)日：1987-07-22
申请号：EP83304458.9
申请日：1983-08-02
申请人： RCA CORPORATION
CPC分类号： H04N9/78
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公开(公告)号：EP0100679B1
公开(公告)日：1986-10-01
申请号：EP83304459.7
申请日：1983-08-02
申请人： RCA CORPORATION
发明人： Lewis, Henry Garton, Jr. , Balaban, Alvin Reuben , Bolger, Thomas Vincent , Steckler, Steven Alan
CPC分类号： H04N9/78
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8.发明授权
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9.发明公开Dispositif de déchiffrement d'images de télévision brouillées par permutations circulaires 失效Entzerrerfürdurch zyklische VerwechslungverschlüsselteFernsehbilder。
公开(公告)号：EP0126495A1
公开(公告)日：1984-11-28
申请号：EP84200256.0
申请日：1984-02-22
CPC分类号： H04N11/06 , H04N7/1696
摘要： Dispositif de déchiffrement d'images de télévision brouillées, à l'émission, par application aux signaux vidéo de permutations circulaires, à partir d'adresses x i de points de coupure délivrées par un générateur d'adresses numériques pseudoaléatoires. Selon que les signaux sont des signaux composites de type SECAM, PAL ou NTSC ou des composantes séparées telles que des composantes analogiques de type MAC, ce dispositif comprend pour la remise en ordre des signaux permutés deux mémoires (M 1 ) et (M' 1 ) de type série ou deux jeux de mémoires (M 1 , M' 1 ) et (M 2 , M' 2 ) de type série utilisés alternativement, le nombre n i de cellules de chaque mémoire étant égal à la longueur du signal utile à laquelle on applique la permutation circulaire. Le déchiffrement est réalisé par rebouciage des mémoires sur elles-mêmes et application à partir d'un circuit de commande de déchiffrement (300) d'une horloge effectuant un décalage y i =n i -x i complémentaire du décalage opéré à l'émission à partir de l'adresse x,.
Application: récepteurs de télévision.摘要翻译： 1.一种解密电视图像的装置，通过将由单独的组件组成的视频信号，例如具有MAC类型的模拟分量的信号提交给由伪距离产生的切割点的地址xi进行循环排列， 随机数字地址发生器，包括用于重新排列置换信号的两组串行类型的模拟或数字存储器，其输出在解密期间连接到它们的输入，这些组交替地使用，并且每个包括与分开的多个存储器 对于每一行传输的组件，并且每个存储器的单元的数目ni等于进行循环排列的有用信号的长度，所述装置的特征在于，用于通过a的解密操作的时钟频率 与传输影响的移位互补的移位足够高 写入，解密和存储器读取操作的持续时间的总和小于或等于两个行周期。
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10.发明授权
公开(公告)号：EP0558562B1
公开(公告)日：1995-08-23
申请号：EP91920192.1
申请日：1991-11-21
CPC分类号： H04N11/16 , H04N11/167
摘要： To increase the horizontal bandwith of the Weston PAL chrominance signal spectrum folding techniques are used. Spectral components with high horizontal frequency and low vertical and/or temporal frequency are carried as components with low horizontal frequency and high vertical and/or temporal frequency. A matrix (120) forms U+V(P) and U-V(M) chrominance signals which are then prefiltered using either rhombic spatial filters or rhombic vertical-temporal filters (122, 124). The two signals are then sampled by sampler (126, 128) which together with switch (136) form U+V samples on alternate lines to the U-V samples. The sampling patterns for the P and M signals are identical but shifted.
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