公开(公告)号：JP2013196177A

公开(公告)日：2013-09-30

申请号：JP2012060892

申请日：2012-03-16

申请人： Ricoh Co Ltd ,  株式会社リコー

发明人： ARAI KUNIAKI

IPC分类号： G05F1/56

摘要： PROBLEM TO BE SOLVED: To control a power source voltage not to become equal to or less than a fixed value, when a current is extracted beyond a value corresponding to a capacity of a power source and the power source voltage is decreased.SOLUTION: A power supply circuit includes a power source configured such that a power source voltage is decreased when a current is extracted beyond a value corresponding to the maximum capacity of a power source. The power supply circuit includes voltage comparison means which compares an input voltage with a predetermined reference voltage, and controls a current of an input power source so that the input voltage does not become equal to or lower than a predetermined voltage when the current is extracted beyond the value corresponding to the maximum capacity of a power source and the power source voltage is decreased.

摘要翻译： 要解决的问题：当电流被提取超过与电源的容量相对应的值并且电源电压降低时，来控制不变得等于或小于固定值的电源电压。解决方案：A 电源电路包括电源，其配置为当电流被提取超过对应于电源的最大容量的值时，电源电压降低。 电源电路包括电压比较装置，其将输入电压与预定参考电压进行比较，并且控制输入电源的电流，使得当电流被提取超过时输入电压不会变得等于或低于预定电压 对应于电源的最大容量和电源电压的值减小。

公开(公告)号：JP2009213329A

公开(公告)日：2009-09-17

申请号：JP2008056426

申请日：2008-03-06

申请人： Ricoh Co Ltd ,  株式会社リコー

发明人： ARAI KUNIAKI

IPC分类号： H02J7/10 ,  H01M10/44

CPC分类号： H02J7/0072 ,  Y10T307/406 ,  Y10T307/549

摘要： PROBLEM TO BE SOLVED: To provide a charging control circuit capable of accurately detecting a charging current and accurately performing a constant-current charging, even when a difference in voltage drops below 1 V between a supply voltage and a voltage in a secondary battery. SOLUTION: An offset voltage Vof is applied to the input of an operational amplifier circuit 13 connected to the input terminal accepting the drain of a driver transistor M1 and the drain of a mirror transistor M2. The amplifier circuit 13 control an operation in an NMOS transistor M5 so as to lower the voltage Vds between a drain and a source in the mirror transistor M2 by a predetermined level than that of the driver transistor M1. COPYRIGHT: (C)2009,JPO&INPIT

摘要翻译： 要解决的问题：为了提供一种能够精确地检测充电电流并精确地执行恒定电流充电的充电控制电路，即使在电源电压和次级电压之间的电压差低于1V时， 电池。 解决方案：将偏移电压Vof施加到连接到接受驱动晶体管M1的漏极和反射镜晶体管M2的漏极的输入端的运算放大器电路13的输入。 放大器电路13控制NMOS晶体管M5中的操作，以将反射镜晶体管M2中的漏极和源极之间的电压Vds降低到与驱动晶体管M1的电压相同的预定电平。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2005100593A

公开(公告)日：2005-04-14

申请号：JP2004139735

申请日：2004-05-10

申请人： Ricoh Co Ltd ,  株式会社リコー

发明人： ARAI KUNIAKI

IPC分类号： G11B20/14 ,  G11B7/005

摘要： PROBLEM TO BE SOLVED: To prevent adverse influences of phase shifts in a filter circuit while comparatively reducing cost and a time.
SOLUTION: When manufacturing an optical disk drive which has a first filter circuit to remove the noise of the wobble signals caused by the wobbling of information tracks from the received signals, and a second filter circuit to extract frequency components near fundamental frequency components of the wobble signals caused by the wobbling of the information tracks from the received signals, a test signal of the same frequency as the fundamental frequency component of the wobble signal extracted at the time of information recording is inputted to the first and the second filter circuits (S102), and the phase difference between the test signals outputted from the first and second filter circuits is obtained (S103, S104). Then, the phase difference of the two signals inputted to a multiplier is adjusted by the phase adjusting circuit according to the obtained phase difference (S105, S106).
COPYRIGHT: (C)2005,JPO&NCIPI

摘要翻译： 要解决的问题：为了防止滤波器电路中的相移的不利影响，同时相对降低成本和时间。 解决方案：当制造具有第一滤波器电路以消除由接收信号摆动信息轨道引起的摆动信号的噪声的光盘驱动器，以及第二滤波器电路，以提取基本频率分量附近的频率分量 由信号轨迹从接收信号的摆动引起的摆动信号中，将与在信息记录时提取的摆动信号的基频分量相同频率的测试信号输入到第一和第二滤波电路 （S102），并且获得从第一和第二滤波器电路输出的测试信号之间的相位差（S103，S104）。 然后，通过相位调整电路根据获得的相位差来调整输入到乘法器的两个信号的相位差（S105，S106）。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2005100575A

公开(公告)日：2005-04-14

申请号：JP2003368476

申请日：2003-10-29

申请人： Ricoh Co Ltd ,  株式会社リコー

发明人： ARAI KUNIAKI

IPC分类号： G11B20/14 ,  G11B7/0045 ,  G11B7/005

摘要： PROBLEM TO BE SOLVED: To provide an adjusting method of an optical disk drive that can prevent an adverse influence of a phase shift in a filter circuit while comparatively reducing a cost and a time. SOLUTION: First, inputting a substitute signal S21 equivalent to a wobble signal to the input side of a filter circuit 44 from an oscilator 71 to detect the phase difference between input and output signals of a HPF46+LPF47 passage on an oscilloscope 72. Then the phase of a recording start timing signal specified by the wobble signal is adjusted and set up according to the detected phase difference. Thus, it is possible to make adjustment for optimizing a recording start position without actually recording/reproducing for each optical disk drive. COPYRIGHT: (C)2005,JPO&NCIPI

摘要翻译： 要解决的问题：提供一种光盘驱动器的调节方法，其可以防止在滤波器电路中的相移的不利影响，同时相对降低成本和时间。 解决方案：首先，从振荡器71向滤波器电路44的输入侧输入等同于摆动信号的替代信号S21，以检测示波器72上的HPF46 + LPF47通道的输入和输出信号之间的相位差 然后根据检测到的相位差来调整并设定由摆动信号指定的记录开始定时信号的相位。 因此，可以进行优化记录开始位置的调整，而无需对每个光盘驱动器实际记录/再现。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2011176930A

公开(公告)日：2011-09-08

申请号：JP2010038575

申请日：2010-02-24

申请人： Ricoh Co Ltd ,  株式会社リコー

发明人： ARAI KUNIAKI

IPC分类号： H02J7/10 ,  G01R31/36 ,  H01M10/44

CPC分类号： Y02E60/12

摘要： PROBLEM TO BE SOLVED: To provide a charging circuit and a charging method wherein charging can be carried out substantially to the full.
SOLUTION: The charging circuit controls a direct-current voltage applied to an input terminal and thereby charges a secondary battery connected to an output terminal by constant current-constant voltage charging. The charging circuit includes a first operational amplifier circuit in which an output transistor is placed between an input terminal and an output terminal and a voltage dividing resistor is connected in parallel with the secondary battery and to which a first reference voltage and a potential of the other electrode of the secondary battery are applied, and a second operational amplifier circuit to which a second reference voltage and a divided voltage of the secondary battery are applied. The negative pole of the second reference voltage is connected to the negative pole of the secondary battery and the output transistor is controlled by both the operational amplifier circuits.
COPYRIGHT: (C)2011,JPO&INPIT

摘要翻译： 要解决的问题：提供充电电路和充电方法，其中可充分充电进行充电。 解决方案：充电电路控制施加到输入端子的直流电压，从而通过恒定电流恒定电压充电对连接到输出端子的二次电池进行充电。 充电电路包括第一运算放大器电路，其中输出晶体管被放置在输入端子和输出端子之间，分压电阻器与二次电池并联连接，并且第一参考电压和另一个的电位 施加二次电池的电极，并且施加第二参考电压和二次电池的分压的第二运算放大器电路。 第二参考电压的负极连接到二次电池的负极，输出晶体管由两个运算放大器电路控制。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2009071052A

公开(公告)日：2009-04-02

申请号：JP2007238164

申请日：2007-09-13

申请人： Ricoh Co Ltd ,  株式会社リコー

发明人： ARAI KUNIAKI

IPC分类号： H01L21/822 ,  H01L27/04 ,  H01M10/46 ,  H02H7/18 ,  H02J7/00

CPC分类号： Y02E60/12

摘要： PROBLEM TO BE SOLVED: To cause a semiconductor device for secondary battery protection not to malfunction even if a V-terminal voltage or Cout-terminal voltage exceeds a Vdd-terminal voltage.
SOLUTION: The semiconductor device for secondary battery protection protects a secondary battery by detecting overcharging, overdischarging, a charge overcurrent, a discharge overcurrent, or a short-circuit current of the secondary battery. The semiconductor device is characterized in that the position of an element having the same potential with an overcharging detection output terminal and a charger minus-potential input terminal and the position of a discharge overcurrent detecting comparator are arranged near both diagonal ends of a chip (substrate).
COPYRIGHT: (C)2009,JPO&INPIT

摘要翻译： 要解决的问题：即使V端电压或Cout端电压超过Vdd端电压，使二次电池保护的半导体器件也不会发生故障。 解决方案：用于二次电池保护的半导体器件通过检测二次电池的过充电，过放电，充电过电流，放电过电流或短路电流来保护二次电池。 半导体器件的特征在于，具有与过充电检测输出端子和充电器负电位输入端子相同电位的元件的位置和放电过电流检测比较器的位置布置在芯片（基板）的两个对角端附近 ）。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2004088703A

公开(公告)日：2004-03-18

申请号：JP2002250365

申请日：2002-08-29

申请人： Ricoh Co Ltd ,  株式会社リコー

发明人： ARAI KUNIAKI

IPC分类号： G03B13/36 ,  G02B7/28 ,  G02B7/36 ,  H04N5/232 ,  H04N5/335 ,  H04N5/341 ,  H04N5/345 ,  H04N5/372 ,  H04N5/376 ,  H04N101/00

摘要： PROBLEM TO BE SOLVED: To provide a digital still camera which reads out only a part of CCD pixels at AF (auto-focusing) time, shortens the AF building time, and reduces power consumption.
SOLUTION: The digital still camera 1 can read out only a center region of regions where the CCD 4 is equally divided into (m) (m: odd number) in horizontal direction, and (n) (n: odd number) in vertical direction. At the time of auto-focusing, a reset 15 controls a horizontal synchronous reset signal which resets a horizontal synchronous signal HD and a vertical synchronous reset signal VD for a timing generator 9. A horizontal synchronous reset signal and the vertical synchronous reset signal from the reset 15 to a timing generator 9 are controlled to update the timing by multiplying (m + 1)/2mn to a value at monitoring mode time (in a case that frame update time is the same vertical decimation rate to the monitoring). By this method, the camera reads out only the center region of the CCD4 by the timing generator.
COPYRIGHT: (C)2004,JPO

公开(公告)号：JP2004023442A

公开(公告)日：2004-01-22

申请号：JP2002175716

申请日：2002-06-17

申请人： Ricoh Co Ltd ,  株式会社リコー

发明人： SAKAGUCHI TOMOHIRO ,  ARAI KUNIAKI

IPC分类号： H04N5/225 ,  H04N5/335 ,  H04N5/341 ,  H04N5/369 ,  H04N5/372 ,  H04N5/376 ,  H04N101/00

摘要： PROBLEM TO BE SOLVED: To provide an image pickup device in which a short return time and low power consumption are made compatible by driving a CCD and its driving circuit slowly while it is not necessary to utilize the output of the CCD such as when charging a stroboscope, during a menu mode, when reproducing an image or in the case of writing onto a card.
SOLUTION: In the image pickup device having an imaging device 12 for picking up an image of an object, a DSP 14 for processing an output of the imaging device 12 into a luminance signal and a chrominance signal and a clock generator 17 for varying a driving frequency of the imaging device 12, the image pickup device has the clock generator 17 for lowering the driving frequency of the imaging device when charging for the stroboscope, during the menu mode, when reproducing the image or in the case of writing onto the card.
COPYRIGHT: (C)2004,JPO

公开(公告)号：JP2014011733A

公开(公告)日：2014-01-20

申请号：JP2012148631

申请日：2012-07-02

申请人： Ricoh Co Ltd ,  株式会社リコー

发明人： SUGANO JUNICHI ,  ARAI KUNIAKI

IPC分类号： H03K5/13 ,  H03H11/26

CPC分类号： H03K5/13 ,  H03H11/26 ,  H03K2005/00195

摘要： PROBLEM TO BE SOLVED: To provide a delay circuit that can add the function of setting a detection delay time by an external capacitance without adding to the number of terminals of a semiconductor device, and a semiconductor device having the delay circuit.SOLUTION: An output control circuit 120 controls the level of an output signal from an output terminal OUT to a high level or a low level or controls the output terminal to a high impedance state. A delay time setting circuit 110 discharges a capacitance 1 in response to a control signal CntS from a logic circuit 130, and generates a delay time setting signal DLY on the basis of a voltage across the capacitance 1. The logic circuit 130 responds to a detection signal Det by controlling the output control circuit 120 to bring the output terminal OUT to the high impedance state and outputting the control signal CntS to the delay time setting circuit 110. The output control circuit 120 is further controlled to output the low level output signal in response to the delay time setting signal DLY.

摘要翻译： 要解决的问题：提供一种延迟电路，其可以增加通过外部电容设置检测延迟时间的功能，而不增加半导体器件的端子数量，以及具有延迟电路的半导体器件。解决方案：输出 控制电路120将输出端子OUT的输出信号的电平控制到高电平或低电平，或者将输出端控制到高阻抗状态。 延迟时间设置电路110响应于来自逻辑电路130的控制信号CntS而放电电容1，并且基于电容1两端的电压产生延迟时间设置信号DLY。逻辑电路130响应检测 信号Det通过控制输出控制电路120使输出端OUT达到高阻态，并将控制信号CntS输出到延迟时间设置电路110.进一步控制输出控制电路120以输出低电平输出信号 响应于延迟时间设置信号DLY。

公开(公告)号：JP2011182484A

公开(公告)日：2011-09-15

申请号：JP2010041385

申请日：2010-02-26

申请人： Ricoh Co Ltd ,  株式会社リコー

发明人： ARAI KUNIAKI

IPC分类号： H02J7/02 ,  H01M2/10 ,  H01M10/42

CPC分类号： H02J7/0026 ,  H01M10/425 ,  H01M2200/00 ,  H02J7/0016

摘要： PROBLEM TO BE SOLVED: To provide a secondary battery protection circuit for cell balance control of a cell pack, where a plurality of secondary batteries are connected in series. SOLUTION: The secondary battery protection circuit includes a plurality of switches M11, M21, M31, M41, M51 for cell balance connected in parallel to each of a plurality of secondary batteries cell 1 to 5; a charging switch controller (comprising comparators COMP 1 to 5, NOR circuits NOR 1 to 5, and a NOR circuit NOR 6) that turns on each of transistor switches M11, M21, M31, M41, M51 connected to the secondary batteries cell 1 to 5 having an output voltage not less than a preset return voltage level VREL at charge, and turns off each of the transistor switches M11, M21, M31, M41, M51 when output voltages of all the secondary batteries cell 1 to 5 reach at least a return voltage level VREL. Over-discharge control is performed in cooperation with over charge control to the respective secondary batteries. COPYRIGHT: (C)2011,JPO&INPIT

摘要翻译： 要解决的问题：提供一种其中多个二次电池串联连接的电池组的电池平衡控制的二次电池保护电路。 解决方案：二次电池保护电路包括用于与多个二次电池单元1至5中的每一个并联连接的用于电池平衡的多个开关M11，M21，M31，M41，M51; 充电开关控制器（包括比较器COMP 1至5，NOR电路NOR 1至5和NOR电路NOR 6），其将连接到二次电池单元1的晶体管开关M11，M21，M31，M41，M51， 5，其输出电压不低于充电时的预设返回电压电平VREL，并且当所有二次电池单元1至5的输出电压达到至少一个时，截止每个晶体管开关M11，M21，M31，M41，M51 返回电压电平VREL。 与相应的二次电池的过充电控制协同进行过放电控制。 版权所有（C）2011，JPO＆INPIT