적층 가능한 리드 프레임을 갖는 얇은 반도체 패키지 및그 제조방법
    8.
    发明公开
    적층 가능한 리드 프레임을 갖는 얇은 반도체 패키지 및그 제조방법 失效
    具有可堆叠铅笔的半导体封装及其制造方法,用于在不同外部引线的同一平面上位置外部引线

    公开(公告)号:KR1020050020500A

    公开(公告)日:2005-03-04

    申请号:KR1020030058508

    申请日:2003-08-23

    发明人: 김진호 윤성환

    IPC分类号: H01L23/12

    摘要: PURPOSE: A thin semiconductor package with a stackable leadframe is provided to position an external lead on the same plane without varying the external lead by using a flat leadframe as a terminal pad part. CONSTITUTION: A semiconductor chip(34) is mounted on a paddle part(26) of a leadframe while the front surface of a semiconductor chip faces downward, wherein a hole is formed in the center part of the paddle part. The lower surface of the paddle part is electrically connected to a bonding pad of the semiconductor chip whose surface faces downward by a wire(36). A terminal pad part(28) having an upper surface higher than the paddle part and a lower surface lower than the paddle part is formed in the edge of the leadframe, connected to an external terminal. An intermediate lead(30) connects the paddle part with the terminal pad part. The semiconductor chip and the wire are protected and molded by encapsulant.

    摘要翻译: 目的:提供具有可堆叠引线框架的薄半导体封装,以通过使用扁平引线框架作为端子焊盘部分来将外部引线定位在同一平面上,而不改变外部引线。 构成:半导体芯片的前表面朝向下方,半导体芯片(34)安装在引线框的桨部(26)上,其中在桨部的中心部分形成有孔。 桨形部分的下表面通过导线(36)电连接到其表面朝下的半导体芯片的接合焊盘。 在引线框的边缘形成具有比桨部高的上表面和低于桨叶部分的下表面的端子焊盘部分(28),连接到外部端子。 中间引线(30)将桨叶部分与端子垫部分连接。 半导体芯片和导线由密封剂保护和模制。