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公开(公告)号：US20250102277A1
公开(公告)日：2025-03-27
申请号：US18474817
申请日：2023-09-26
Inventor： Frank R Stolle , Simone B. Bortolami , Larry H Mack
Abstract: A weapon-mountable smart optic comprising: a time reference configured to output a signal comprising a periodically-repeating feature and time metadata and comprising a first oscillator; at least two sensors configured to gather data, each comprising secondary oscillators; and at least one processor in communication with each of the at least two sensors; wherein each of the at least two sensors is in operative communication with the time reference and is configured to associate an edge of the periodically-repeating signal with a time conveyed by the time metadata, and wherein each of the at least two sensors is configured to gather data, associate time metadata with the gathered data, and to send the gathered data with time metadata to the at least one processor, and wherein the at least one processor is configured to fuse the data gathered by each of the at least two sensors.
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公开(公告)号：US12253964B2
公开(公告)日：2025-03-18
申请号：US17841724
申请日：2022-06-16
Inventor： David D. Moser , Daniel L. Stanley , Tate J. Keegan , Sheldon L. Grass , Joshua C. Schabel , Christopher N. Peters
Abstract: A system that includes a plurality of encapsulation blocks having a plurality of digital signal processing (DSP) blocks provided with preconfigured logic functions and a plurality of pacing control networks operatively connected with the plurality of DSP blocks. The system also includes a streaming cross bar operatively connected with each encapsulation block of the plurality of encapsulation blocks. Each encapsulation block of the plurality of encapsulation blocks includes a DSP block of the plurality of DSP blocks and a pacing control network of the plurality of the pacing control networks. Each DSP block of the plurality of DSP blocks is independently and separately connected with the streaming cross bar via the plurality of pacing control networks.
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公开(公告)号：US20250077755A1
公开(公告)日：2025-03-06
申请号：US18456648
申请日：2023-08-28
Inventor： David D. Moser , Daniel L. Stanley , Jane O. Gilliam
IPC: G06F30/343
Abstract: A semiconductor device includes a data port, a programmable logic block for executing a manufacturer test, and a processor operatively coupled to the data port. The processor is configured to assert, in a first modality, a configuration isolation signal to the data port. The data port is configured to be communicatively isolated from the programmable logic block while the configuration isolation signal is asserted. The processor is configured to de-assert, in a second modality, the configuration isolation signal from the data port. The data port is configured to be communicatively coupled to the programmable logic block while the configuration isolation signal is de-asserted. In some examples, the semiconductor device includes a communication interface communicatively coupled to the programmable logic block, wherein the processor is further configured to cause, in the first modality, data to be loaded into the programmable logic block from a first-in-first-out (FIFO) buffer of the communication interface.
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公开(公告)号：US12235367B2
公开(公告)日：2025-02-25
申请号：US17953512
申请日：2022-09-27
Inventor： John E. Acheson , Michael N. Kloos , Nathaniel L. James , Mitchell Dennis
IPC: G01S19/37
Abstract: Techniques are provided for employing an embedded software defined radio (SDR) in a navigation system. A navigation system implementing the techniques according to an embodiment includes a global positioning system (GPS) receiver configured to acquire and track received GPS signals. The system also includes an SDR configured to process received communication signals. The communication signals include timing data. The SDR is further configured to calculate position and navigation data based on a combination of the processed communication signals and the tracked GPS signals provided by the GPS receiver. The system further includes a system timer configured to provide a common time base for use by the GPS receiver and the SDR. The navigation system is implemented in an application specific integrated circuit (ASIC).
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公开(公告)号：US20250062544A1
公开(公告)日：2025-02-20
申请号：US18451393
申请日：2023-08-17
Inventor： Alexander D. Johnson , James F. Fung
Abstract: An antenna assembly includes a first flare arm, a second flare arm located adjacent to the first flare arm, a feed block having an opening therein, a feed slot extending from the opening to an outer periphery of the feed block, and a feed line integral with the feed block as a contiguous unitary component. The first flare arm and the second flare arm are symmetric about the feed block. The feed line can have a first portion integrated into the feed block and a second portion at least partially extending across the feed slot. A method of fabricating an antenna assembly includes additively manufacturing a feed block having a feed slot adjacent to a first flare arm and a second flare arm, and additively manufacturing a feed line having a first portion integral with the feed block, and a second portion at least partially extending across the feed slot.
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Patent Agency Ranking
公开(公告)号：US12203191B2
公开(公告)日：2025-01-21
申请号：US18073228
申请日：2022-12-01
Inventor： Peter G. Schunemann , Kevin T. Zawilski
Abstract: A method of growing large GaAs or GaP IR window slabs by HVPE, and in embodiments by LP-HVPE, includes obtaining a plurality of thin, single crystal, epitaxial-quality GaAs or GaP wafers, cleaving the wafers into tiles having ultra-flat, atomically smooth, substantially perpendicular edges, and then butting the tiles together to form an HVPE substrate larger than 4 inches for GaP, and larger than 8 inches or even 12 inches for GaAs. Subsequent HVPE growth causes the individual tiles to fuse by optical bonding into a large “tiled” single crystal wafer, while any defects nucleated at the tile boundaries are healed, causing the tiles to merge with themselves and with the slab with no physical boundaries, and no degradation in optical quality. A dopant such as Si can be added to the epitaxial gases during the final HVPE growth stage to produce EMI shielded GaAs windows.
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公开(公告)号：US20250007755A1
公开(公告)日：2025-01-02
申请号：US18341848
申请日：2023-06-27
Inventor： Randall T. Enderby , Jake H. Rivard
IPC: H04L12/50
Abstract: A switch matrix structure for planar circuitry such as printed circuit boards and integrated circuits includes a plurality of signal dividers and a plurality of switches. Each signal divider is configured to receive a corresponding input signal and generate a corresponding plurality of divider output signals. Each switch is configured to receive a corresponding divider output from a corresponding signal divider. Each switch is configured to provide a corresponding output signal such that a plurality of output signals are generated by the plurality of switches. In an example, the plurality of switches are arranged in a column, with a first subset of the plurality of signal dividers on a first side of the column, and a second subset of the plurality of signal dividers on a second side of the column. In an example, such a routing configuration reduces a number of routing layers and/or a number of via transitions.
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公开(公告)号：US20250006779A1
公开(公告)日：2025-01-02
申请号：US18342963
申请日：2023-06-28
Inventor： Nathaniel P. Wyckoff , Jacob R. Mauermann , Alexander S. Warren , William J. Klema
IPC: H01G4/012 , H01G4/33 , H01L23/00 , H01L23/498 , H01G4/228
Abstract: Integrated capacitor structures are described. In an example, an interconnect structure includes a first layer of conductive material and a second layer of conductive material. The first layer includes a first horizontal portion having a first opening and extending along a first horizontal plane, and a first vertical portion. The second layer includes a second horizontal portion having a second opening and extending along a second horizontal plane, and a second vertical portion. The interconnect structure also includes a dielectric extending along a third horizontal plane between the first and second horizontal portions, and having one or more openings. The first vertical component extends upward from the first horizontal portion, through one opening in the dielectric and the second opening of second layer, and the second vertical component extends downward from the second horizontal portion, through another opening in the dielectric and the first opening of first layer.
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公开(公告)号：US12184409B1
公开(公告)日：2024-12-31
申请号：US18345023
申请日：2023-06-30
Inventor： Michael H. Stockmaster , Ying Cho J. Lai
IPC: H04K3/00 , H01Q3/26 , H04B7/0426
Abstract: Techniques are provided for jammer detection. A methodology implementing the techniques according to an embodiment includes steering a beam in a specified direction to generate a power measurement, the specified direction selected from a plurality of directions, such that the method comprises scanning through the plurality of directions. The method also includes adaptively steering a null in the specified direction and measuring a gain of the received signal in the null direction. The method further includes calculating a difference between the power measurement and the measured gain and generating a difference-based detection that the received signal is associated with a jammer at the specified direction. The difference-based detection is based on a comparison of the power difference to a power difference threshold value. The power difference threshold value is based on a desired probability of false alarm and probability of detection, and/or desired angular resolution.
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10.发明授权公开(公告)号：US12176930B2
公开(公告)日：2024-12-24
申请号：US17815164
申请日：2022-07-26
Inventor： James H. Steenson, Jr. , Joseph P. Cullen
Abstract: Techniques to dynamically adjust the corner frequency of a high-pass filter in response to a time-domain amplitude value of an output signal, thereby preserving accuracy while promptly recovering the signal's baseline value. A system can be configured to filter frequency-domain values of an input signal based on a filtering characteristic. The filtering characteristic can be set dynamically in response to a time-domain value of an amplitude of an output signal. The filtering characteristic can comprise a corner frequency, and the system can include a high-pass filter configured to filter out frequency components at frequencies lower than the corner frequency. The system is configured to dynamically change the corner frequency from a first value to a second value, in response to the time-domain value of the amplitude crossing a threshold value. The system may dynamically change the corner frequency within a time interval after the crossing.
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