Abstract:
A semiconductor element includes: a substrate; a gate dielectric layer formed over the substrate; a flat band voltage adjusting layer formed over the gate dielectric layer; and an intermediate layer formed between the gate dielectric layer and the flat band voltage adjusting layer. A negative flat band voltage generated at the intermediate layer and a positive flat band voltage generated between the substrate and the gate dielectric layer may offset each other.
Abstract:
A semiconductor element includes: a substrate; a gate dielectric layer formed over the substrate; a flat band voltage adjusting layer formed over the gate dielectric layer; and an intermediate layer formed between the gate dielectric layer and the flat band voltage adjusting layer. A negative flat band voltage generated at the intermediate layer and a positive flat band voltage generated between the substrate and the gate dielectric layer may offset each other.