公开(公告)号：US06994563B2

公开(公告)日：2006-02-07

申请号：US10742437

申请日：2003-12-19

Applicant: Kamran Amini ,  Joseph Curtis Diepenbrock ,  Robert Joseph Evans ,  Michael Leo Scollard

Inventor： Kamran Amini ,  Joseph Curtis Diepenbrock ,  Robert Joseph Evans ,  Michael Leo Scollard

IPC: H01R12/20

CPC classification number: H05K1/117 ,  H05K1/162 ,  H05K2201/0792 ,  H05K2201/09672 ,  Y10S439/951

Abstract: A signal channel extends from motherboard to a daughter card across an edge connection. The daughter card includes a conductive plane that is held at a constant electrical potential. In order to compensate for a number of sources of inductance within the signal line at the edge connection, a circuit trace forming a portion of the signal channel includes an enlarged portion, spaced inward along the daughter card from the contact pads forming the edge connection, that adds capacitive coupling of the signal channel with the conductive plane.

Abstract translation: 信号通道通过边缘连接从母板延伸到子卡。 子卡包括保持在恒定电位的导电平面。 为了补偿在边缘连接处的信号线内的多个电感源，形成信号通道的一部分的电路迹线包括沿着形成边缘连接的接触焊盘沿着子卡向内间隔开的扩大部分， 这增加了信号通道与导电平面的电容耦合。

公开(公告)号：US20180057944A1

公开(公告)日：2018-03-01

申请号：US15715099

申请日：2017-09-25

Applicant: Nader Mohammadian ,  Ali Mahtab ,  Seyed Amir Hosein Emami ,  Kamran Amini ,  Fereidoun Payami ,  Mohammad Hosein Bina

Inventor： Nader Mohammadian ,  Ali Mahtab ,  Seyed Amir Hosein Emami ,  Kamran Amini ,  Fereidoun Payami ,  Mohammad Hosein Bina

IPC: C23C18/32 ,  C23C18/16 ,  C23C14/14 ,  C23C16/06 ,  C23C4/126

CPC classification number: C23C18/32 ,  C23C4/126 ,  C23C14/14 ,  C23C16/06 ,  C23C18/1662 ,  C23C18/1692 ,  C23C18/1834 ,  C23C18/34

Abstract: A multilayer metal-matrix composite that includes a metal core sheet and a plurality of side sheets is disclosed in which the metal core sheet is reinforced with a reinforcement material selected from the group consisting of ceramic reinforcements. The reinforced metal core sheet is coated with an electroless coating. A method of fabricating a multilayer metal-matrix composite with reinforced particles and a coating using a combination of electroless coating method and accumulative roll bonding method is further described in this disclosure with the aim of reducing the number of required accumulative roll bonding cycles to obtain improved or desired properties.

公开(公告)号：US07017052B2

公开(公告)日：2006-03-21

申请号：US09990823

申请日：2001-11-16

Applicant: Ameha Aklilu ,  Kamran Amini ,  Jordan Hsiao Ping Chin ,  James Alexander Day, Jr. ,  Chad Lee Gettelfinger ,  Eric Richard Kern

Inventor： Ameha Aklilu ,  Kamran Amini ,  Jordan Hsiao Ping Chin ,  James Alexander Day, Jr. ,  Chad Lee Gettelfinger ,  Eric Richard Kern

IPC: G06F1/26

CPC classification number: G06F9/4418

Abstract: A method for reducing the boot time for a computer includes: supplying power to the computer; disabling a plurality of input/output (I/O) devices coupled to the computer; performing a boot process for the computer; and placing the computer in a suspend to memory state before a user turns on the computer. The method reduces the boot time for a computer by placing the computer in a suspend to memory mode rather than completely shutting off the computer. In this manner, when a user of the computer pushes the power button, the computer wakes up from the suspend to memory mode instead of being required to perform the entire boot process. This significantly reduces the time required to make the computer available to the user, allowing the computer to function like an appliance.

Abstract translation: 一种用于减少计算机的启动时间的方法包括：向计算机供电; 禁用耦合到所述计算机的多个输入/输出（I / O）设备; 为计算机执行引导过程; 并在用户打开计算机之前将计算机置于暂存状态。 该方法通过将计算机暂停到内存模式而不是完全关闭计算机来减少计算机的启动时间。 以这种方式，当计算机的用户按下电源按钮时，计算机从挂起状态唤醒到存储器模式，而不是执行整个引导过程。 这大大减少了使计算机可用于用户所需的时间，从而允许计算机像设备一样运行。

公开(公告)号：US20050136699A1

公开(公告)日：2005-06-23

申请号：US10742437

申请日：2003-12-19

Applicant: Kamran Amini ,  Joseph Diepenbrock ,  Robert Evans ,  Michael Scollard

Inventor： Kamran Amini ,  Joseph Diepenbrock ,  Robert Evans ,  Michael Scollard

IPC: H01R12/71 ,  H01R12/00 ,  H05K1/11 ,  H05K1/16

CPC classification number: H05K1/117 ,  H05K1/162 ,  H05K2201/0792 ,  H05K2201/09672 ,  Y10S439/951

Abstract: A signal channel extends from motherboard to a daughter card across an edge connection. The daughter card includes a conductive plane that is held at a constant electrical potential. In order to compensate for a number of sources of inductance within the signal line at the edge connection, a circuit trace forming a portion of the signal channel includes an enlarged portion, spaced inward along the daughter card from the contact tabs forming the edge connection, that adds capacitive coupling of the signal channel with the conductive plane.

Abstract translation: 信号通道通过边缘连接从母板延伸到子卡。 子卡包括保持在恒定电位的导电平面。 为了补偿在边缘连接处的信号线中的多个电感源，形成信号通道的一部分的电路迹线包括沿着子卡从形成边缘连接的接触片向内间隔开的扩大部分， 这增加了信号通道与导电平面的电容耦合。

公开(公告)号：US06615360B1

公开(公告)日：2003-09-02

申请号：US09491030

申请日：2000-01-25

Applicant: Kamran Amini ,  Robert Joseph Evans ,  Henry Gaines McMillan ,  Robert Matthew Piper ,  Michael Leo Scollard ,  Paul Maylon Smith

Inventor： Kamran Amini ,  Robert Joseph Evans ,  Henry Gaines McMillan ,  Robert Matthew Piper ,  Michael Leo Scollard ,  Paul Maylon Smith

IPC: G06F126

CPC classification number: G06F1/26

Abstract: A method of controlling the power-on of a computer system by providing a plurality of monitor lines interconnected with respective components of the computer system, monitoring the lines using a control circuit in response to a power-on reset signal, and executing a system power-on sequence in response to a determination by the control circuit that the components of the computer system are functioning properly. If the computer system has a plurality of CPU slots, the control circuit determines if a CPUs or terminator cartridges is plugged into the CPU slots, and determines that a properly matched CPU has been installed into the system, and that multiple CPUs contain compatible power supply requirements. Finally, the control circuit can determine that a power regulator is functioning properly.

Abstract translation: 一种通过提供与计算机系统的各个组件互连的多个监视器线来控制计算机系统的通电的方法，响应于上电复位信号使用控制电路来监视线路，并执行系统电源 - 以响应于控制电路确定计算机系统的组件正常工作的顺序。 如果计算机系统具有多个CPU插槽，则控制电路确定CPU或终端盒是否插入到CPU插槽中，并确定正确匹配的CPU已经安装到系统中，并且多个CPU包含兼容的电源 要求。 最后，控制电路可以确定功率调节器正常工作。

公开(公告)号：US06234807B1

公开(公告)日：2001-05-22

申请号：US09489807

申请日：2000-01-24

Applicant: Kamran Amini ,  Joseph Curtis Diepenbrock ,  Robert J. Evans ,  Mike L. Scollard ,  Marcel B. Tran

Inventor： Kamran Amini ,  Joseph Curtis Diepenbrock ,  Robert J. Evans ,  Mike L. Scollard ,  Marcel B. Tran

IPC: H01R909

CPC classification number: H05K1/117 ,  H01R12/721 ,  H05K2201/09709

Abstract: A printed circuit board connector edge tab design has increased tab contact area with a large local capacitance at the connector interface. This serves to balance out the inductive effects of the connector and results in a lower overall channel impedance at the interface. The invention replaces the prior art plated pathway to the upper row of tabs with wider tabs on the lower row. The edges of the lower row tabs are spaced such that each of the connector pins destined for the upper row straddle two of the lower tabs as they travel upward. This design prevents the pins from contacting the fiberglass substrate of the board while it traverses the lower row of tabs. The absence of the prior art plated pathways allows each of the lower row tabs to be expanded into the space formerly occupied by the pathways. This design also allows the increased capacitive area of the edge tabs to be located in very close proximity to the connection area between the connector pins and the edge tabs.

Abstract translation: 印刷电路板连接器边缘突片设计在连接器接口处具有增加的接头面积，并具有大的本地电容。 这用于平衡连接器的感应效应，并导致接口处的整体通道阻抗较低。 本发明将现有技术的电镀通路替换到下排突起的上排突出部，并且在下排上具有较宽的突片。 下排突片的边缘间隔开，使得当上行的每个连接器针向上行进时，跨越两个下突片。 这种设计防止销穿过板的玻璃纤维基板，同时穿过下一排突片。 不存在现有技术的电镀通道允许每个下排突片被扩展成先前被路径占据的空间。 该设计还允许边缘突片的增加的电容区域位于非常接近连接器插脚和边缘片之间的连接区域。