公开(公告)号：US06693890B1

公开(公告)日：2004-02-17

申请号：US09594468

申请日：2000-06-14

申请人： Karl Yick ,  Oswald Correya ,  Ronald Ross ,  Christopher Flores

发明人： Karl Yick ,  Oswald Correya ,  Ronald Ross ,  Christopher Flores

IPC分类号： H04B7216

CPC分类号： H04B1/70752 ,  H04B1/70775

摘要： An acquisition module for acquiring signal timing in a CDMA system has a register for storing and organizing synchronization code, at least 4 match filters for match filtering between I/Q samples and the corresponding synchronization code, at least 4 absolute value blocks for determining absolute values of match filtering results, a summation function for summing results obtained through match filtering and through absolute value taking, and a control logic for controlling the acquisition process, characterized in that the acquisition module loads a 64-bit section of synchronization code and I/Q complex samples and match filters them in a simultaneous manner and, upon registering a value greater than a preset threshold, acquires an initial timing, the initial timing being verified over the remaining 64-bit sections of synchronization code using the same control circuitry used in acquiring the timing.

摘要翻译： 用于在CDMA系统中获取信号定时的获取模块具有用于存储和组织同步码的寄存器，用于在I / Q采样和对应的同步码之间进行匹配滤波的至少4个匹配滤波器，用于确定绝对值的至少4个绝对值块 匹配滤波结果，用于通过匹配滤波和通过绝对值获取获得的结果求和的求和函数，以及用于控制获取过程的控制逻辑，其特征在于，采集模块加载64位部分的同步码和I / Q 复杂样本和匹配以同时方式对它们进行滤波，并且在注册大于预设阈值的值时，获取初始定时，使用在采集中使用的相同控制电路在剩余的64位部分的同步码中验证初始定时 时机。

公开(公告)号：US08498326B1

公开(公告)日：2013-07-30

申请号：US12804545

申请日：2010-07-23

申请人： Siva Simanapalli ,  Julien D. Pons ,  Arnaud Charton ,  Karl Yick ,  Qasem Aldrubi ,  Hossein Dehghan-Fard

发明人： Siva Simanapalli ,  Julien D. Pons ,  Arnaud Charton ,  Karl Yick ,  Qasem Aldrubi ,  Hossein Dehghan-Fard

IPC分类号： H04L27/00

CPC分类号： H04L25/03178 ,  H04L1/0048 ,  H04L1/0054 ,  H04L1/22 ,  H04L5/0046 ,  H04L25/03159 ,  H04L25/03184 ,  H04L27/30 ,  H04L2025/03414

摘要： A multi-tone transceiver with a components forming a transmit path and a receive path configured to couple via a subscriber line to an opposing multi-tone transceiver for frequency division multiplexed multi-tone modulated communications therewith is disclosed. A noise margin channel identifier is configured to identify within a received tone set, discrete tones each associated with a corresponding one of at least two channels differing from one another in a relative noise margin of associated tones. A Viterbi decoder is responsive to the channel identification provided by the noise margin channel identifier to discretely decode each of the at least two channels; thereby improving the fidelity of the error correction provided by the Viterbi decoder by discretely processing the identified channels within the received set of tones.

摘要翻译： 公开了具有形成发送路径的组件和被配置为经由用户线耦合到相对的多音调收发器以用于频分复用多音调调制通信的多音调收发器。 噪声容限信道标识符被配置为在接收到的音调集合内识别在相关联音调的相对噪声容限中彼此不同的至少两个信道中的相应一个信道中的每一个相关联的离散音调。 维特比解码器响应于由噪声容限信道标识符提供的信道标识，离散地解码至少两个信道中的每一个; 从而通过离散地处理所接收的音调集合中的所识别的频道来提高由维特比解码器提供的纠错的保真度。