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公开(公告)号：US4104547A
公开(公告)日：1978-08-01
申请号：US779393
申请日：1977-03-21
CPC分类号： H03K3/02337 , G03B7/0807
摘要： An improved comparator circuit is employed to respond to the charge on a capacitor which represents the integrated value of an input current. When the charge exceeds the comparator trip point, an output is generated. The output is delayed in time from the onset of the input current by an amount that is almost exactly linearly proportional to the current magnitude. The improvement comprises a circuit that senses the onset of comparator conduction and supplies the current necessary to operate the comparator. At very low input current values a condition can be reached where the current drawn by the comparator input equals or exceeds the applied current. For this condition an ordinary comparator will never trip. The improved circuit prevents this and, since the current added is only to compensate, the timing function is not seriously perturbed.
摘要翻译： 采用改进的比较器电路来响应表示输入电流的积分值的电容器上的电荷。 当电荷超过比较器跳变点时，产生一个输出。 输出从输入电流开始的时间延迟几乎与电流幅度几乎完全线性比例的量。 该改进包括感测比较器导通的开始并提供操作比较器所需的电流的电路。 在非常低的输入电流值下，可以达到一个条件，其中比较器输入的电流等于或超过施加的电流。 对于这种情况，普通的比较器将永远不会跳闸。 改进的电路防止这种情况，并且由于添加的电流只是为了补偿，所以定时功能不会被严重干扰。
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公开(公告)号：US4481481A
公开(公告)日：1984-11-06
申请号：US465721
申请日：1983-02-11
CPC分类号： H03F1/0261 , H03F1/302
摘要： An integrated circuit buffer inverter is created by cascading an emitter follower stage with a common emitter stage. Both stages include constant collector current loads. The emitter follower stage is adaptively biased from a current mirror that is driven from the collector of the emitter follower for the purpose of maximizing bipolar drive to the common emitter stage.
摘要翻译： 通过将射极跟随器级与公共发射极级级联来创建集成电路缓冲器反相器。 两个阶段都包括恒定的集电极电流负载。 射极跟随器级自动偏置于从射极跟随器的集电极驱动的电流镜，以便将双极驱动最大化到共发射极级。
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公开(公告)号：US4092611A
公开(公告)日：1978-05-30
申请号：US794433
申请日：1977-05-06
CPC分类号： H03F3/08
摘要： A differential amplifier has one input connected to a reference potential and a photo diode connected in series with a level shift to the other input. A negative feedback loop is also coupled into other input. This stabilizes the amplifier and, if the level shift is made equal to the reference potential, biases the photo diode to zero, thereby reducing leakage current. A second feedback loop is used to adaptively bias the tail current in the differential amplifier.
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公开(公告)号：US4459699A
公开(公告)日：1984-07-10
申请号：US307705
申请日：1981-10-02
CPC分类号： H04L27/142 , H04L25/062
摘要： A carrier current receiver employs a comparator driven differentially to square a received data signal. The same drive signal is applied to a sample and hold circuit in which a capacitor is charged to a level that is related to the data signal offset. A voltage-to-current converter responds to the capacitor charge and feeds a current to the input where it acts to correct the offset.
摘要翻译： 载波电流接收机使用差分驱动的比较器来对接收到的数据信号进行平方。 相同的驱动信号被施加到其中电容器被充电到与数据信号偏移相关的电平的采样和保持电路。 电压 - 电流转换器响应于电容器电荷，并将电流馈送到输入端，以用于校正偏移。
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公开(公告)号：US4118621A
公开(公告)日：1978-10-03
申请号：US798728
申请日：1977-05-19
CPC分类号： G01N21/74 , Y10S136/291 , Y10S236/15
摘要： A circuit useful in replicating the current produced in a photo diode operated as a current source at zero bias. A second scaled area photo diode is used to bias the circuit to maintain the zero bias over a wide range of illumination levels. The circuit operates in the picoampere range and is linear over at least six orders of magnitude.
摘要翻译： 用于复制在零偏压下作为电流源工作的光电二极管中产生的电流的电路。 第二比例尺度的光电二极管用于偏置电路以在宽范围的照明级别上保持零偏置。 电路工作在微微范围内，线性至少在六个数量级以上。
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6.发明授权Simultaneous communication of analog and binary information in a single frame of a pulse count modulated digital signal 失效在脉冲计数调制数字信号的单个帧中同时通信模拟和二进制信息
公开(公告)号：US4346380A
公开(公告)日：1982-08-24
申请号：US140589
申请日：1980-04-15
CPC分类号： G08C15/12 , A63H30/04 , H04J3/1676
摘要： A communication system for providing both analog information pulses and digital information pulses in a single frame of a pulse train, including circuitry for sequentially multiplexing and modulating a first given number "m" of analog information input channels to provide "m" analog information pulses in each frame of the pulse train to convey information respectively representative of the analog information in the analog information input channels; and circuitry for modulating a second given number "n" of binary information input channels to provide a variable number of digital information pulses and for multiplexing the variable number of digital information pulses in each frame of the pulse train sequentially to the analog information pulses, wherein the variable number of digital information pulses is within a range of 2.sup.n pulses to convey information respectively representative of the binary information in the "n" binary information input channels. A system for producing analog information signals and binary information signals from such a pulse train includes a binary counter for counting the number of information pulses in each frame of the pulse train; "m" gates coupled to given stages of the counter for producing "m" analog information signals respectively conveying the analog information conveyed by the "m" analog information pulses in each frame; and "n" gates coupled to given stages of the counter for producing "n" binary information signals containing binary information that is representative of the number of digital information pulses included in the count for each frame. The counter is reset by a sync pulse included in each frame of the pulse train the binary information is read from the counter in response to the sync pulse to produce the binary information signals.
摘要翻译： 一种用于在脉冲串的单个帧中提供模拟信息脉冲和数字信息脉冲的通信系统，包括用于顺序复用和调制模拟信息输入通道的第一给定数量“m”的电路，以提供“m”个模拟信息脉冲 脉冲串的每一帧传送分别代表模拟信息输入通道中的模拟信息的信息; 以及用于调制第二给定数量“n”的二进制信息输入通道以提供可变数量的数字信息脉冲并用于将脉冲序列的每个帧中的可变数量的数字信息脉冲顺序复用到模拟信息脉冲的电路，其中 数字信息脉冲的可变数量在2n个脉冲的范围内，以传送分别表示“n”个二进制信息输入通道中的二进制信息的信息。 用于从这样的脉冲串产生模拟信息信号和二进制信息信号的系统包括用于对脉冲序列的每个帧中的信息脉冲数进行计数的二进制计数器; “m”门耦合到计数器的给定级，用于产生分别传送由每个帧中的“m”个模拟信息脉冲传送的模拟信息的“m”个模拟信息信号; 和“n”门耦合到计数器的给定级，用于产生“n”个二进制信息信号，该二进制信息信号包含代表每帧计数的数字信息脉冲数的二进制信息。 计数器由包括在脉冲串的每个帧中的同步脉冲复位，响应于同步脉冲从计数器读取二进制信息以产生二进制信息信号。
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