VOLTAGE GLITCH DETECTORS
    2.
    发明申请

    公开(公告)号:US20250060409A1

    公开(公告)日:2025-02-20

    申请号:US18235156

    申请日:2023-08-17

    Abstract: Positive and negative glitch detectors detect glitches on a supply voltage node. The positive glitch detector has a capacitor and a resistor serially coupled between the supply voltage node and ground. An amplifier is coupled to a first node between the capacitor and resistor. A positive glitch results in the glitch on the first node (normally biased low) and generation of a clock pulse by the amplifier that causes a latch to assert its output to indicate the positive glitch. The negative glitch detector has a capacitor and resistor coupled in parallel between the supply voltage node and a second node. A negative glitch on the supply voltage node decreases the voltage on the second node (normally biased high) and an inverting amplifier coupled to the second node generates a clock pulse to cause a latch to assert its output to indicate the negative voltage glitch.

    FAST RF POWER MEASUREMENT APPARATUS FOR PRODUCTION TESTING

    公开(公告)号:US20250044393A1

    公开(公告)日:2025-02-06

    申请号:US18921236

    申请日:2024-10-21

    Inventor: Anant Verma

    Abstract: A system and method for performing production testing on high power semiconductor devices is disclosed. The system includes signal generators, RF meters, sockets, couplers and connectors which also function as switches when connected to an external cable. A calibration process is executed which allows the controller to create a correlation between measurements taken by the RF meter and the actual voltages, and power levels present at the device under test. By performing this calibration, it is possible to perform production testing of devices much more quickly and reliably.

    ROM/OTP Patching Using ECC/Parity Manipulation

    公开(公告)号:US20250036504A1

    公开(公告)日:2025-01-30

    申请号:US18225471

    申请日:2023-07-24

    Inventor: Thomas David

    Abstract: Methods of performing updates to a software image that is disposed in a read only memory or a one time programmable memory device are disclosed. The method includes causing an ECC error at the beginning of a function that has been modified. This ECC error causes an exception. The exception handler determines the address where the ECC error was detected was located and searches a dictionary. This dictionary contains entries that each have an original address in the ROM or OTP Memory and the patch address in a nonvolatile writable memory. The exception handler then causes the processing unit to jump to the patch address, where a modified function is located.

    Commissioning of lighting systems using Bluetooth direction finding

    公开(公告)号:US12193128B2

    公开(公告)日:2025-01-07

    申请号:US17706796

    申请日:2022-03-29

    Inventor: Levente Kovacs

    Abstract: A system and method for the commissioning of a lighting system is disclosed. The lighting system includes a plurality of lighting devices and a plurality of locators. Each lighting device includes a light emitting element and a wireless tag. After the lighting system is installed, each lighting device transmits one or more packets that contain a constant tone extension (CTE). This CTE allows the locators to determine the angle of arrival of the incoming packet. By combining the angles of arrival from several locators, it is possible to ascertain the physical location of the lighting device that transmitted the CTE. In this way, the physical location of each lighting device can be correlated to its network address.

    NON-COHERENT DSSS DEMODULATOR WITH FAST SIGNAL ARRIVAL DETECTION AND IMPROVED TIMING AND FREQUENCY OFFSET ESTIMATION

    公开(公告)号:US20250007769A1

    公开(公告)日:2025-01-02

    申请号:US18217015

    申请日:2023-06-30

    Abstract: A receiver includes a demodulator having a configurable correlator bank that helps with fast and robust signal detection. The demodulator detects arrival of a first preamble symbol using a first correlator bank configuration. The demodulator makes a course frequency offset estimation after detection of the first preamble signal and the receiver adjusts a frequency used by a mixer based on the coarse frequency offset estimation. The demodulator confirms signal arrival detection with detection of a second preamble symbol. A coarse timing estimation is generated using a second correlator bank configuration using a multi-symbol observation period. A fine frequency offset estimation is made using a third correlation bank configuration. A fine timing estimation is made using a fourth correlation bank configuration. The demodulator then despreads received symbols using a fifth correlator bank configuration.

    METHOD AND APPARATUS TO IMPROVE RECEIVED SIGNAL STRENGTH INDICATOR MEASUREMENT AT A RECEIVER

    公开(公告)号:US20250007630A1

    公开(公告)日:2025-01-02

    申请号:US18344116

    申请日:2023-06-29

    Abstract: In one embodiment, a receiver includes: an analog front end (AFE) circuit to receive and process an incoming radio frequency (RF) analog signal comprising a packet; an analog-to-digital converter (ADC) coupled to the AFE circuit to receive and digitize an analog signal based on the RF analog signal into a digital signal; a packet detector coupled to the ADC to detect the packet based on the digital signal; and a computation circuit coupled to the packet detector. The computation circuit may be configured to determine a received signal strength indicator (RSSI) value based at least in part on a portion of a preamble of the packet.

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