公开(公告)号：US20200313397A1

公开(公告)日：2020-10-01

申请号：US16405827

申请日：2019-05-07

申请人： TRANSWAVE PHOTONICS, LLC.

发明人： Seungyong JUNG ,  Mikhail A. BELKIN

IPC分类号： H01S5/34 ,  H01S5/026 ,  H01S5/10 ,  H01S5/343

摘要： A photonic integrated circuit device includes a passive waveguide section formed over a substrate, a quantum cascade laser (QCL) gain section formed over the substrate and adjacent to the passive waveguide section, and a taper section disposed between and in contact with each of the passive waveguide section and the QCL gain section. In some embodiments, the passive waveguide section includes a passive waveguide core layer disposed between a first cladding layer and a second cladding layer. In some examples, the QCL gain section includes a QCL active region disposed between a first confinement layer and a second confinement layer, where the QCL active region has a lower index of refraction than each of the first and second confinement layers. In some embodiments, the taper section is configured to optically couple the QCL gain section to the passive waveguide section.

公开(公告)号：US11211773B2

公开(公告)日：2021-12-28

申请号：US16405827

申请日：2019-05-07

申请人： TRANSWAVE PHOTONICS, LLC.

发明人： Seungyong Jung ,  Mikhail A. Belkin

IPC分类号： H01S5/00 ,  H01S5/34 ,  H01S5/026 ,  H01S5/343 ,  H01S5/10 ,  G02B6/122

摘要： A photonic integrated circuit device includes a passive waveguide section formed over a substrate, a quantum cascade laser (QCL) gain section formed over the substrate and adjacent to the passive waveguide section, and a taper section disposed between and in contact with each of the passive waveguide section and the QCL gain section. In some embodiments, the passive waveguide section includes a passive waveguide core layer disposed between a first cladding layer and a second cladding layer. In some examples, the QCL gain section includes a QCL active region disposed between a first confinement layer and a second confinement layer, where the QCL active region has a lower index of refraction than each of the first and second confinement layers. In some embodiments, the taper section is configured to optically couple the QCL gain section to the passive waveguide section.

公开(公告)号：US20240030679A1

公开(公告)日：2024-01-25

申请号：US18376841

申请日：2023-10-05

申请人： TRANSWAVE PHOTONICS, LLC.

发明人： Seungyong JUNG ,  Mikhail A. BELKIN

IPC分类号： H01S5/024 ,  H01S5/34 ,  G02B6/12 ,  H01S5/02355 ,  H01S5/02 ,  H01S5/0234

CPC分类号： H01S5/02469 ,  H01S5/3402 ,  G02B6/12 ,  H01S5/02355 ,  H01S5/0217 ,  H01S5/0201 ,  H01S5/0234

摘要： Structures and methods for reducing the thermal resistance of quantum cascade laser (QCL) devices and QCL-based photonic integrated circuits (QCL-PIC) are provided, wherein, in various embodiments, the native substrate of QCL and QCL-PIC devices is replaced with a foreign substrate that has very high thermal conductivity, for example, using wafer bonding methods. In some examples, wafer bonding of processed, semi-processed, or unprocessed QCL and QCL-PIC epilayers or devices on their native substrate to a high-thermal-conductivity substrate is performed, followed by removal of the native substrate via selective etching, and performing additional device processing if necessary. Thereafter, in some embodiments, cleaving or dicing individual devices from the bonded wafers may be performed, for example, for mounting onto heat sinks.

公开(公告)号：US20220209498A1

公开(公告)日：2022-06-30

申请号：US17138829

申请日：2020-12-30

申请人： TRANSWAVE PHOTONICS, LLC.

发明人： Seungyong JUNG ,  Mikhail A. BELKIN

IPC分类号： H01S5/024 ,  H01S5/34 ,  G02B6/12 ,  H01S5/0234 ,  H01S5/02 ,  H01S5/02355

摘要： Structures and methods for reducing the thermal resistance of quantum cascade laser (QCL) devices and QCL-based photonic integrated circuits (QCL-PIC) are provided. In various embodiments, the native substrate of QCL and QCL-PIC devices is replaced with a foreign substrate that has very high thermal conductivity, for example, using wafer bonding methods. In some examples, wafer bonding of processed, semi-processed, or unprocessed QCL and QCL-PIC epilayers or devices on their native substrate to a high-thermal-conductivity substrate is performed, followed by removal of the native substrate via selective etching, and performing additional device processing if necessary. Thereafter, in some embodiments, cleaving or dicing individual devices from the bonded wafers may be performed, for example, for mounting onto heat sinks.