FANOUT MODULE INTEGRATING A PHOTONIC INTEGRATED CIRCUIT

    公开(公告)号:US20220342165A1

    公开(公告)日:2022-10-27

    申请号:US17361033

    申请日:2021-06-28

    Abstract: A semiconductor package includes a first mold layer at least partially encasing at least one photonic integrated circuit. A redistribution layer structure is fabricated on the first mold layer, the redistribution layer structure including dielectric material and conductive structures. A second mold layer at least partially encasing at least one semiconductor chip is fabricated on the redistribution layer structure. The redistribution layer structure provides electrical pathways between the at least one semiconductor chip and the at least one photonic integrated circuit. One or more voids are defined in the second mold layer in an area above an optical interface of the at least one photonic integrated circuit such that light is transmittable through dielectric material above the optical interface.

    FANOUT MODULE INTEGRATING A PHOTONIC INTEGRATED CIRCUIT

    公开(公告)号:US20240019649A1

    公开(公告)日:2024-01-18

    申请号:US18357376

    申请日:2023-07-24

    CPC classification number: G02B6/4274 G02B6/4255 G02B6/425 G02B6/43

    Abstract: A semiconductor package includes a first mold layer at least partially encasing at least one photonic integrated circuit. A redistribution layer structure is fabricated on the first mold layer, the redistribution layer structure including dielectric material and conductive structures. A second mold layer at least partially encasing at least one semiconductor chip is fabricated on the redistribution layer structure. The redistribution layer structure provides electrical pathways between the at least one semiconductor chip and the at least one photonic integrated circuit. One or more voids are defined in the second mold layer in an area above an optical interface of the at least one photonic integrated circuit such that light is transmittable through dielectric material above the optical interface.

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