公开(公告)号：US20150347230A1

公开(公告)日：2015-12-03

申请号：US14821124

申请日：2015-08-07

Applicant: Apple Inc.

Inventor： Micha Anholt ,  Naftali Sommer ,  Gil Semo ,  Tal Inbar

IPC: G06F11/10 ,  H03M13/00 ,  H03M13/45

CPC classification number: G06F11/1076 ,  H03M13/03 ,  H03M13/1525 ,  H03M13/45 ,  H03M13/617

Abstract: Methods for Error Correction Code (ECC) decoding include producing syndromes from a set of bits, which represent data that has been encoded with the ECC. An Error Locator Polynomial (ELP) is generated based on the syndromes. At least some of the ELP roots are identified, and the errors indicated by these roots are corrected. Each syndrome may be produced by applying to the bits vector operations in a vector space. Each syndrome is produced by applying vector operations using a different basis of the vector space. The ELP may be evaluated on a given field element by operating on ELP coefficients using serial multipliers, wherein each serial multiplier performs a sequence of multiplication cycles and produces an interim result in each cycle. Responsively to detecting at least one interim result indicating that the given element is not an ELP root, the multiplication cycles are terminated before completion of the sequence.

Abstract translation: 用于纠错码（ECC）解码的方法包括从表示已经用ECC编码的数据的一组位产生综合征。 错误定位器多项式（ELP）是基于综合征产生的。 识别至少一些ELP根，并校正由这些根指示的错误。 可以通过应用向量空间中的比特向量操作来产生每个综合征。 通过使用向量空间的不同基础应用向量运算来产生每个综合征。 可以通过使用串行乘法器对ELP系数进行操作，在给定的场元件上评估ELP，其中每个串行乘法器执行乘法周期序列，并在每个周期中产生中间结果。 响应于检测至少一个中期结果，指示给定的元素不是ELP根，在完成序列之前终止乘法循环。

公开(公告)号：US20150160890A1

公开(公告)日：2015-06-11

申请号：US14457237

申请日：2014-08-12

Applicant: Apple Inc.

Inventor： Gil Semo ,  Asaf Bart ,  Avraham Poza Meir

IPC: G06F3/06 ,  G06F12/02

CPC classification number: G06F3/0688 ,  G06F3/0619 ,  G06F3/0658 ,  G06F11/1008 ,  G06F12/0246 ,  G06F2212/7208

Abstract: A device includes multiple memory devices, a bus splitter and a package. The bus splitter is configured to exchange storage commands and data with an external host using an external Input/Output (I/O) bus, and to distribute the storage commands and the data over multiple buses connected to respective subsets of the memory devices, so as to relay the storage commands and the data between the multiple memory devices and the external host. The memory devices and the bus splitter are contained in the package, in a multi-chip package (MCP) structure.

Abstract translation: 设备包括多个存储设备，总线分配器和封装。 总线分配器被配置为使用外部输入/输出（I / O）总线与外部主机交换存储命令和数据，并且通过连接到存储器设备的各个子集的多个总线来分配存储命令和数据，因此 用于中继存储命令和多个存储器件与外部主机之间的数据。 存储器件和总线分配器以多芯片封装（MCP）结构包含在封装中。

公开(公告)号：US09136871B2

公开(公告)日：2015-09-15

申请号：US14182802

申请日：2014-02-18

Applicant: Apple Inc.

Inventor： Micha Anholt ,  Naftali Sommer ,  Gil Semo ,  Tal Inbar

IPC: H03M13/15 ,  H03M13/03

CPC classification number: G06F11/1076 ,  H03M13/03 ,  H03M13/1525 ,  H03M13/45 ,  H03M13/617

Abstract: Methods for Error Correction Code (ECC) decoding include producing syndromes from a set of bits, which represent data that has been encoded with the ECC. An Error Locator Polynomial (ELP) is generated based on the syndromes. At least some of the ELP roots are identified, and the errors indicated by these roots are corrected. Each syndrome may be produced by applying to the bits vector operations in a vector space. Each syndrome is produced by applying vector operations using a different basis of the vector space. The ELP may be evaluated on a given field element by operating on ELP coefficients using serial multipliers, wherein each serial multiplier performs a sequence of multiplication cycles and produces an interim result in each cycle. Responsively to detecting at least one interim result indicating that the given element is not an ELP root, the multiplication cycles are terminated before completion of the sequence.

Abstract translation: 用于纠错码（ECC）解码的方法包括从表示已经用ECC编码的数据的一组位产生综合征。 错误定位器多项式（ELP）是基于综合征产生的。 识别至少一些ELP根，并校正由这些根指示的错误。 可以通过应用向量空间中的比特向量操作来产生每个综合征。 通过使用向量空间的不同基础应用向量运算来产生每个综合征。 可以通过使用串行乘法器对ELP系数进行操作，在给定的场元件上评估ELP，其中每个串行乘法器执行乘法循环序列，并在每个周期中产生中间结果。 响应于检测至少一个中期结果，指示给定的元素不是ELP根，在完成序列之前终止乘法循环。

公开(公告)号：US08700977B2

公开(公告)日：2014-04-15

申请号：US13920140

申请日：2013-06-18

Applicant: Apple Inc.

Inventor： Micha Anholt ,  Naftali Sommer ,  Gil Semo ,  Tal Inbar

IPC: H03M13/00

CPC classification number: G06F11/1076 ,  H03M13/03 ,  H03M13/1525 ,  H03M13/45 ,  H03M13/617

Abstract: Methods for Error Correction Code (ECC) decoding include producing syndromes from a set of bits, which represent data that has been encoded with the ECC. An Error Locator Polynomial (ELP) is generated based on the syndromes. At least some of the ELP roots are identified, and the errors indicated by these roots are corrected. Each syndrome may be produced by applying to the bits vector operations in a vector space. Each syndrome is produced by applying vector operations using a different basis of the vector space. The ELP may be evaluated on a given field element by operating on ELP coefficients using serial multipliers, wherein each serial multiplier performs a sequence of multiplication cycles and produces an interim result in each cycle. Responsively to detecting at least one interim result indicating that the given element is not an ELP root, the multiplication cycles are terminated before completion of the sequence.

Abstract translation: 用于纠错码（ECC）解码的方法包括从表示已经用ECC编码的数据的一组位产生综合征。 错误定位器多项式（ELP）是基于综合征产生的。 识别至少一些ELP根，并校正由这些根指示的错误。 可以通过应用向量空间中的比特向量操作来产生每个综合征。 通过使用向量空间的不同基础应用向量运算来产生每个综合征。 可以通过使用串行乘法器对ELP系数进行操作，在给定的场元件上评估ELP，其中每个串行乘法器执行乘法周期序列，并在每个周期中产生中间结果。 响应于检测至少一个中期结果，指示给定的元素不是ELP根，在完成序列之前终止乘法循环。

公开(公告)号：US09535788B2

公开(公告)日：2017-01-03

申请号：US14821124

申请日：2015-08-07

Applicant: Apple Inc.

Inventor： Micha Anholt ,  Naftali Sommer ,  Gil Semo ,  Tal Inbar

IPC: G06F11/10 ,  H03M13/45 ,  H03M13/00 ,  H03M13/15 ,  H03M13/03

CPC classification number: G06F11/1076 ,  H03M13/03 ,  H03M13/1525 ,  H03M13/45 ,  H03M13/617

Abstract: Methods for Error Correction Code (ECC) decoding include producing syndromes from a set of bits, which represent data that has been encoded with the ECC. An Error Locator Polynomial (ELP) is generated based on the syndromes. At least some of the ELP roots are identified, and the errors indicated by these roots are corrected. Each syndrome may be produced by applying to the bits vector operations in a vector space. Each syndrome is produced by applying vector operations using a different basis of the vector space. The ELP may be evaluated on a given field element by operating on ELP coefficients using serial multipliers, wherein each serial multiplier performs a sequence of multiplication cycles and produces an interim result in each cycle. Responsively to detecting at least one interim result indicating that the given element is not an ELP root, the multiplication cycles are terminated before completion of the sequence.

Abstract translation: 用于纠错码（ECC）解码的方法包括从表示已经用ECC编码的数据的一组位产生综合征。 错误定位器多项式（ELP）是基于综合征产生的。 识别至少一些ELP根，并校正由这些根指示的错误。 可以通过应用向量空间中的比特向量操作来产生每个综合征。 通过使用向量空间的不同基础应用向量运算来产生每个综合征。 可以通过使用串行乘法器对ELP系数进行操作，在给定的场元件上评估ELP，其中每个串行乘法器执行乘法周期序列，并在每个周期中产生中间结果。 响应于检测至少一个中期结果，指示给定的元素不是ELP根，在完成序列之前终止乘法循环。

公开(公告)号：US20130283133A1

公开(公告)日：2013-10-24

申请号：US13920140

申请日：2013-06-18

Applicant: Apple Inc.

Inventor： Micha Anholt ,  Naftali Sommer ,  Gil Semo ,  Tal Inbar

IPC: H03M13/03

CPC classification number: G06F11/1076 ,  H03M13/03 ,  H03M13/1525 ,  H03M13/45 ,  H03M13/617

Abstract: Methods for Error Correction Code (ECC) decoding include producing syndromes from a set of bits, which represent data that has been encoded with the ECC. An Error Locator Polynomial (ELP) is generated based on the syndromes. At least some of the ELP roots are identified, and the errors indicated by these roots are corrected. Each syndrome may be produced by applying to the bits vector operations in a vector space. Each syndrome is produced by applying vector operations using a different basis of the vector space. The ELP may be evaluated on a given field element by operating on ELP coefficients using serial multipliers, wherein each serial multiplier performs a sequence of multiplication cycles and produces an interim result in each cycle. Responsively to detecting at least one interim result indicating that the given element is not an ELP root, the multiplication cycles are terminated before completion of the sequence.

公开(公告)号：US20160371211A1

公开(公告)日：2016-12-22

申请号：US14806795

申请日：2015-07-23

Applicant: APPLE INC.

Inventor： Ori Isachar ,  Gil Semo ,  Guy Kushtai ,  Tal Lazmi

IPC: G06F13/40 ,  G06F13/28

CPC classification number: G06F13/4013 ,  G06F13/16 ,  G06F13/287 ,  G06F13/4022

Abstract: An apparatus for use with a memory device that has a plurality of memory-device terminals having respective unique bit significances is described. The apparatus includes a memory controller, which includes (i) a plurality of external terminals, each one of the external terminals configured to be in communication with a respective one of the memory-device terminals, (ii) a plurality of internal terminals having respective unique bit significances, (iii) a switching unit, and (iv) a processor. The processor is configured to drive the memory device to communicate a predetermined sequence of bit patterns to the controller, and, in response to the sequence of bit patterns, drive the switching unit to connect each one of the external terminals to a respective one of the internal terminals having the bit significance of the memory-device terminal with which the external terminal is in communication. Other embodiments are also described.

Abstract translation: 描述了一种与存储器件一起使用的装置，该装置具有多个具有各自独特的比特重要性的存储器件终端。 该装置包括存储器控制器，其包括（i）多个外部端子，每个外部端子被配置为与相应的一个存储器件端子通信，（ii）多个内部端子具有相应的 独特的比特意义，（iii）切换单元，和（iv）处理器。 处理器被配置为驱动存储器设备以将预定的位模式序列传送到控制器，并且响应于位模式的顺序驱动切换单元将每个外部终端连接到相应的一个 内部终端具有与外部终端进行通信的存储器件终端的位有意义。 还描述了其它实施例。

公开(公告)号：US09043590B2

公开(公告)日：2015-05-26

申请号：US14055144

申请日：2013-10-16

Applicant: Apple Inc.

Inventor： Ori Isachar ,  Julian Vlaiko ,  Gil Semo ,  Atai Levy

IPC: G06F3/06 ,  G06F1/32

CPC classification number: G06F3/0659 ,  G06F1/3225 ,  G06F3/0604 ,  G06F3/0683

Abstract: A memory device includes a plurality of memory cells, a token input interface, a token output interface and control circuitry. The control circuitry is configured to accept a storage command, to condition execution of at least a part of the storage command on a presence of a token pulse on the token input interface, to execute the storage command, including the conditioned part, in the memory cells upon reception of the token pulse on the token input interface, and to reproduce the token pulse on the token output interface upon completion of the execution.

Abstract translation: 存储器件包括多个存储器单元，令牌输入接口，令牌输出接口和控制电路。 控制电路被配置为接受存储命令，以在令牌输入接口上存在令牌脉冲的情况下调节存储命令的至少一部分的执行，以在存储器中执行包括调节部分的存储命令 在令牌输入接口上接收到令牌脉冲，并且在完成执行时在令牌输出接口上再现令牌脉冲。

公开(公告)号：US20140164884A1

公开(公告)日：2014-06-12

申请号：US14182802

申请日：2014-02-18

Applicant: Apple Inc.

Inventor： Micha Anholt ,  Naftali Sommer ,  Gil Semo ,  Tal Inbar

IPC: H03M13/15

CPC classification number: G06F11/1076 ,  H03M13/03 ,  H03M13/1525 ,  H03M13/45 ,  H03M13/617

Abstract: Methods for Error Correction Code (ECC) decoding include producing syndromes from a set of bits, which represent data that has been encoded with the ECC. An Error Locator Polynomial (ELP) is generated based on the syndromes. At least some of the ELP roots are identified, and the errors indicated by these roots are corrected. Each syndrome may be produced by applying to the bits vector operations in a vector space. Each syndrome is produced by applying vector operations using a different basis of the vector space. The ELP may be evaluated on a given field element by operating on ELP coefficients using serial multipliers, wherein each serial multiplier performs a sequence of multiplication cycles and produces an interim result in each cycle. Responsively to detecting at least one interim result indicating that the given element is not an ELP root, the multiplication cycles are terminated before completion of the sequence.

Abstract translation: 用于纠错码（ECC）解码的方法包括从表示已经用ECC编码的数据的一组位产生综合征。 错误定位器多项式（ELP）是基于综合征产生的。 识别至少一些ELP根，并校正由这些根指示的错误。 可以通过应用向量空间中的比特向量操作来产生每个综合征。 通过使用向量空间的不同基础应用向量运算来产生每个综合征。 可以通过使用串行乘法器对ELP系数进行操作，在给定的场元件上评估ELP，其中每个串行乘法器执行乘法周期序列，并在每个周期中产生中间结果。 响应于检测至少一个中期结果，指示给定的元素不是ELP根，在完成序列之前终止乘法循环。

公开(公告)号：US20140047200A1

公开(公告)日：2014-02-13

申请号：US14055144

申请日：2013-10-16

Applicant: Apple Inc.

Inventor： Ori Isachar ,  Julian Vlaiko ,  Gil Semo ,  Atai Levy

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F1/3225 ,  G06F3/0604 ,  G06F3/0683

Abstract: A memory device includes a plurality of memory cells, a token input interface, a token output interface and control circuitry. The control circuitry is configured to accept a storage command, to condition execution of at least a part of the storage command on a presence of a token pulse on the token input interface, to execute the storage command, including the conditioned part, in the memory cells upon reception of the token pulse on the token input interface, and to reproduce the token pulse on the token output interface upon completion of the execution.

Abstract translation: 存储器件包括多个存储器单元，令牌输入接口，令牌输出接口和控制电路。 控制电路被配置为接受存储命令，以在令牌输入接口上存在令牌脉冲的情况下调节存储命令的至少一部分的执行，以在存储器中执行包括调节部分的存储命令 在令牌输入接口上接收到令牌脉冲，并且在完成执行时在令牌输出接口上再现令牌脉冲。