Replacing end effectors in semiconductor processing systems

    公开(公告)号:US12119256B2

    公开(公告)日:2024-10-15

    申请号:US17467250

    申请日:2021-09-05

    Inventor: Dongyang Chen

    CPC classification number: H01L21/68707

    Abstract: A method of replacing an end effector for wafer handling in a semiconductor processing system includes fixing a first end effector jig to a first stage and a second end effector jig to a second stage of the load lock module; positioning a first end effector at the first end effector jig and a second end effector at the second end effector jig, the second end effector fixed relative to the first end effector; and fixing the second end effector to the second end effector jig. The first end effector is replaced with a replacement end effector and the semiconductor processing system returned to production without re-teaching placement of the replacement end effector in a processing module connected to a wafer handling module mounting the end effectors. Semiconductor processing systems and end effector jigs for replacing end effectors in semiconductor processing systems are also described.

    REPLACING END EFFECTORS IN SEMICONDUCTOR PROCESSING SYSTEMS

    公开(公告)号:US20220076986A1

    公开(公告)日:2022-03-10

    申请号:US17467250

    申请日:2021-09-05

    Inventor: Dongyang Chen

    Abstract: A method of replacing an end effector for wafer handling in a semiconductor processing system includes fixing a first end effector jig to a first stage and a second end effector jig to a second stage of the load lock module; positioning a first end effector at the first end effector jig and a second end effector at the second end effector jig, the second end effector fixed relative to the first end effector; and fixing the second end effector to the second end effector jig. The first end effector is replaced with a replacement end effector and the semiconductor processing system returned to production without re-teaching placement of the replacement end effector in a processing module connected to a wafer handling module mounting the end effectors. Semiconductor processing systems and end effector jigs for replacing end effectors in semiconductor processing systems are also described.

    JIGS AND METHODS OF TEACHING SUBSTRATE HANDLING IN SEMICONDUCTOR PROCESSING SYSTEMS USING JIGS

    公开(公告)号:US20230100356A1

    公开(公告)日:2023-03-30

    申请号:US17934878

    申请日:2022-09-23

    Inventor: Dongyang Chen

    Abstract: A jig for teaching substrate handling in a semiconductor processing system includes a verification pin with a pin width and a disc body. The disc body has a first surface, a second surface opposite the first surface, and a thickness separating the second surface from the first surface of the disc body. The first and second surfaces define a verification aperture coupling the first surface to the second surface of the disc body. The verification aperture has an aperture width equivalent to the pin width of the verification pin to teach a transfer position by slidably receiving the verification pin in the verification aperture and a verification pin seat defined in a load lock of the semiconductor processing system while supported by a substrate transfer robot within the semiconductor processing system. Semiconductor processing systems and methods of teaching substrate handling in semiconductor processing systems are also described.

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