公开(公告)号：US10714668B2

公开(公告)日：2020-07-14

申请号：US16278731

申请日：2019-02-19

Applicant: Au Optronics Corporation

Inventor： Ming-Hsien Lee ,  Yi-Cheng Lin ,  Chuang-Cheng Yang ,  Kai-Wei Hong ,  Chun-Feng Lin

IPC: H01L25/075 ,  H01L33/62 ,  H01L27/12

Abstract: A light-emitting device includes a substrate, a circuit array including a plurality of circuit units disposed on the substrate, a first conductive pattern, a second conductive pattern, a first wire pattern, and a second wire pattern disposed on the circuit array, and a light-emitting element disposed on one of the circuit units. The light-emitting element includes a first electrode and a second electrode respectively electrically connected to the first conductive pattern and the second conductive pattern. The second electrode is not overlapped with the first wire pattern and the second wire pattern. A manufacturing method of the light-emitting device is also provided.

公开(公告)号：US20200028044A1

公开(公告)日：2020-01-23

申请号：US16278731

申请日：2019-02-19

Applicant: Au Optronics Corporation

Inventor： Ming-Hsien Lee ,  Yi-Cheng Lin ,  Chuang-Cheng Yang ,  Kai-Wei Hong ,  Chun-Feng Lin

IPC: H01L33/62 ,  H01L25/075 ,  H01L27/12

Abstract: A light-emitting device includes a substrate, a circuit array including a plurality of circuit units disposed on the substrate, a first conductive pattern, a second conductive pattern, a first wire pattern, and a second wire pattern disposed on the circuit array, and a light-emitting element disposed on one of the circuit units. The light-emitting element includes a first electrode and a second electrode respectively electrically connected to the first conductive pattern and the second conductive pattern. The second electrode is not overlapped with the first wire pattern and the second wire pattern. A manufacturing method of the light-emitting device is also provided.

公开(公告)号：US20170045794A1

公开(公告)日：2017-02-16

申请号：US15232793

申请日：2016-08-09

Applicant: Au Optronics Corporation

Inventor： Chun-Feng Lin ,  Yao-An Hsieh ,  Yu-Ping Kuo ,  Ching-Sheng Cheng

IPC: G02F1/1362 ,  H01L27/12 ,  G02F1/1335 ,  G02F1/1368 ,  G02F1/1343

CPC classification number: G02F1/136286 ,  G02F1/133512 ,  G02F1/134336 ,  G02F2001/134345 ,  G02F2001/136295 ,  H01L27/124 ,  H01L27/1262

Abstract: A pixel array includes pixel unit sets each including a substrate having first and second pixel regions, a scan line, first and second data lines extending along a second direction, first and second active devices respectively in the first and second pixel regions, and first and second pixel electrodes respectively located in the first and second pixel regions and electrically connected to the first and second active devices, respectively. The scan line includes a main scan line and first and second branch scan lines (connected to the main scan line) extending along a first direction. The first active device is electrically connected to the first branch scan line and the first data line. The second active device is electrically connected to the second branch scan line and the second data line. At least one of the first and second data lines is overlapped with the first and second pixel electrodes.

Abstract translation: 像素阵列包括各自包括具有第一和第二像素区域的衬底，扫描线，沿着第二方向延伸的第一和第二数据线，分别在第一和第二像素区域中的第一和第二有源器件的像素单元组， 第二像素电极分别位于第一和第二像素区域中并分别电连接到第一和第二有源器件。 扫描线包括沿着第一方向延伸的主扫描线和第一和第二分支扫描线（连接到主扫描线）。 第一有源器件电连接到第一分支扫描线和第一数据线。 第二有源器件电连接到第二分支扫描线和第二数据线。 第一和第二数据线中的至少一个与第一和第二像素电极重叠。

公开(公告)号：US10971045B2

公开(公告)日：2021-04-06

申请号：US16441018

申请日：2019-06-14

Applicant: Au Optronics Corporation

Inventor： Chun-Feng Lin ,  Chuang-Cheng Yang ,  Ming-Hsien Lee ,  Yi-Cheng Lin ,  Wei-Chia Chiu

IPC: G09G3/20

Abstract: A display apparatus includes a pixel array, a plurality of gate lines and a plurality of de-load lines. The pixel array includes a plurality of display rows, each of the display rows includes a plurality of pixel circuits, and each of the pixel circuits includes a first transistor and a second transistor coupled in series between a data line and a display pixel. A control end of the first transistor of each of the pixel circuits is coupled to one of the gate lines for receiving a gate driving signal. A control end of the second transistor of each of the pixel circuits is coupled to one of the de-load lines for receiving a de-loading signal. Where an enable time period of the de-loading signal received by each of the pixel circuits covers an enable time period of the gate driving signal received by each of the pixel circuits.

公开(公告)号：US20200211433A1

公开(公告)日：2020-07-02

申请号：US16441018

申请日：2019-06-14

Applicant: Au Optronics Corporation

Inventor： Chun-Feng Lin ,  Chuang-Cheng Yang ,  Ming-Hsien Lee ,  Yi-Cheng Lin ,  Wei-Chia Chiu

IPC: G09G3/20

Abstract: A display apparatus includes a pixel array, a plurality of gate lines and a plurality of de-load lines. The pixel array includes a plurality of display rows, each of the display rows includes a plurality of pixel circuits, and each of the pixel circuits includes a first transistor and a second transistor coupled in series between a data line and a display pixel. A control end of the first transistor of each of the pixel circuits is coupled to one of the gate lines for receiving a gate driving signal. A control end of the second transistor of each of the pixel circuits is coupled to one of the de-load lines for receiving a de-loading signal. Where an enable time period of the de-loading signal received by each of the pixel circuits covers an enable time period of the gate driving signal received by each of the pixel circuits.

公开(公告)号：US10067395B2

公开(公告)日：2018-09-04

申请号：US15232793

申请日：2016-08-09

Applicant: Au Optronics Corporation

Inventor： Chun-Feng Lin ,  Yao-An Hsieh ,  Yu-Ping Kuo ,  Ching-Sheng Cheng

IPC: H01L27/12 ,  G02F1/1335 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368

Abstract: A pixel array includes pixel unit sets each including a substrate having first and second pixel regions, a scan line, first and second data lines extending along a second direction, first and second active devices respectively in the first and second pixel regions, and first and second pixel electrodes respectively located in the first and second pixel regions and electrically connected to the first and second active devices, respectively. The scan line includes a main scan line and first and second branch scan lines (connected to the main scan line) extending along a first direction. The first active device is electrically connected to the first branch scan line and the first data line. The second active device is electrically connected to the second branch scan line and the second data line. At least one of the first and second data lines is overlapped with the first and second pixel electrodes.

公开(公告)号：US10930239B2

公开(公告)日：2021-02-23

申请号：US16690606

申请日：2019-11-21

Applicant: AU Optronics Corporation

Inventor： Kai-Wei Hong ,  Chun-Da Tu ,  Ming-Hsien Lee ,  Chuang-Cheng Yang ,  Yi-Cheng Lin ,  Chun-Feng Lin

IPC: G11C19/00 ,  G09G3/36 ,  G11C19/28 ,  G09G3/20

Abstract: The present embodiment of the invention provides a gate driving circuit and a display apparatus using the gate driving circuit. The gate driving circuit has a plurality of shift registers, and each shift register includes a first output unit, a first pull-down unit, a second output unit, a second pull-down unit, a voltage coupling unit, and a voltage boosting unit. The first output unit is coupled to a node and a first output end. The second output unit is coupled to the node and a second output end. The first pull-down unit is coupled to the first output end and a reference potential. The second pull-down unit is coupled to the second output end and the reference potential. The voltage coupling unit is coupled between the node and the second output end. The voltage boosting unit is coupled to a preset potential, the first output end, and a node and a gate high potential of a shift register at a previous stage.

公开(公告)号：US10522105B2

公开(公告)日：2019-12-31

申请号：US15953720

申请日：2018-04-16

Applicant: AU Optronics Corporation

Inventor： Kai-Wei Hong ,  Chun-Da Tu ,  Ming-Hsien Lee ,  Chuang-Cheng Yang ,  Yi-Cheng Lin ,  Chun-Feng Lin

IPC: G11C19/00 ,  G09G3/36 ,  G11C19/28 ,  G09G3/20

Abstract: The present embodiment of the invention provides a gate driving circuit and a display apparatus using the gate driving circuit. The gate driving circuit has a plurality of shift registers, and each shift register includes a first output unit, a first pull-down unit, a second output unit, a second pull-down unit, a voltage coupling unit, and a voltage boosting unit. The first output unit is coupled to a node and a first output end. The second output unit is coupled to the node and a second output end. The first pull-down unit is coupled to the first output end and a reference potential. The second pull-down unit is coupled to the second output end and the reference potential. The voltage coupling unit is coupled between the node and the second output end. The voltage boosting unit is coupled to a preset potential, the first output end, and a node and a gate high potential of a shift register at a previous stage.

公开(公告)号：US20190064978A1

公开(公告)日：2019-02-28

申请号：US16008039

申请日：2018-06-14

Applicant: Au Optronics Corporation

Inventor： Chun-Da Tu ,  Ming-Hsien Lee ,  Kai-Wei Hong ,  Chuang-Cheng Yang ,  Yi-Cheng Lin ,  Chun-Feng Lin

IPC: G06F3/041 ,  G11C19/28 ,  G09G3/20

Abstract: A shift register and a touch display apparatus thereof are provided. The shift register includes a voltage setting unit, a driving unit, a control unit, a discharge unit, a first compensation transistor, and a second compensation transistor. The voltage setting unit sets a terminal voltage of an internal terminal. The driving unit is coupled to the internal terminal to provide a gate signal and a driving signal. The control unit receives the terminal voltage to provide a control signal. The discharge unit discharges the terminal voltage and the gate signal according to the control signal. The first compensation transistor and the second compensation transistor are coupled in series between a touch enable signal and the internal terminal, and control terminals of the first compensation transistor and the second compensation transistor receive the terminal voltage and the touch enable signal, respectively.

公开(公告)号：US20180341161A1

公开(公告)日：2018-11-29

申请号：US16055159

申请日：2018-08-06

Applicant: Au Optronics Corporation

Inventor： Chun-Feng Lin ,  Yao-An Hsieh ,  Yu-Ping Kuo ,  Ching-Sheng Cheng

IPC: G02F1/1362 ,  G02F1/1343 ,  H01L27/12 ,  G02F1/1335

CPC classification number: G02F1/136286 ,  G02F1/133512 ,  G02F1/134336 ,  G02F2001/134345 ,  G02F2001/136295 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1262

Abstract: A pixel array includes pixel unit sets each including a substrate having first and second pixel regions, a scan line, first and second data lines extending along a second direction, first and second active devices respectively in the first and second pixel regions, and first and second pixel electrodes respectively located in the first and second pixel regions and electrically connected to the first and second active devices, respectively. The scan line includes a main scan line and first and second branch scan lines (connected to the main scan line) extending along a first direction. The first active device is electrically connected to the first branch scan line and the first data line. The second active device is electrically connected to the second branch scan line and the second data line. At least one of the first and second data lines is overlapped with the first and second pixel electrodes.