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公开(公告)号：US10971045B2
公开(公告)日：2021-04-06
申请号：US16441018
申请日：2019-06-14
Applicant: Au Optronics Corporation
Inventor： Chun-Feng Lin , Chuang-Cheng Yang , Ming-Hsien Lee , Yi-Cheng Lin , Wei-Chia Chiu
IPC: G09G3/20
Abstract: A display apparatus includes a pixel array, a plurality of gate lines and a plurality of de-load lines. The pixel array includes a plurality of display rows, each of the display rows includes a plurality of pixel circuits, and each of the pixel circuits includes a first transistor and a second transistor coupled in series between a data line and a display pixel. A control end of the first transistor of each of the pixel circuits is coupled to one of the gate lines for receiving a gate driving signal. A control end of the second transistor of each of the pixel circuits is coupled to one of the de-load lines for receiving a de-loading signal. Where an enable time period of the de-loading signal received by each of the pixel circuits covers an enable time period of the gate driving signal received by each of the pixel circuits.
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公开(公告)号：US20200211433A1
公开(公告)日：2020-07-02
申请号：US16441018
申请日：2019-06-14
Applicant: Au Optronics Corporation
Inventor： Chun-Feng Lin , Chuang-Cheng Yang , Ming-Hsien Lee , Yi-Cheng Lin , Wei-Chia Chiu
IPC: G09G3/20
Abstract: A display apparatus includes a pixel array, a plurality of gate lines and a plurality of de-load lines. The pixel array includes a plurality of display rows, each of the display rows includes a plurality of pixel circuits, and each of the pixel circuits includes a first transistor and a second transistor coupled in series between a data line and a display pixel. A control end of the first transistor of each of the pixel circuits is coupled to one of the gate lines for receiving a gate driving signal. A control end of the second transistor of each of the pixel circuits is coupled to one of the de-load lines for receiving a de-loading signal. Where an enable time period of the de-loading signal received by each of the pixel circuits covers an enable time period of the gate driving signal received by each of the pixel circuits.
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公开(公告)号：US10714668B2
公开(公告)日：2020-07-14
申请号：US16278731
申请日：2019-02-19
Applicant: Au Optronics Corporation
Inventor： Ming-Hsien Lee , Yi-Cheng Lin , Chuang-Cheng Yang , Kai-Wei Hong , Chun-Feng Lin
IPC: H01L25/075 , H01L33/62 , H01L27/12
Abstract: A light-emitting device includes a substrate, a circuit array including a plurality of circuit units disposed on the substrate, a first conductive pattern, a second conductive pattern, a first wire pattern, and a second wire pattern disposed on the circuit array, and a light-emitting element disposed on one of the circuit units. The light-emitting element includes a first electrode and a second electrode respectively electrically connected to the first conductive pattern and the second conductive pattern. The second electrode is not overlapped with the first wire pattern and the second wire pattern. A manufacturing method of the light-emitting device is also provided.
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公开(公告)号：US20200028044A1
公开(公告)日：2020-01-23
申请号：US16278731
申请日：2019-02-19
Applicant: Au Optronics Corporation
Inventor： Ming-Hsien Lee , Yi-Cheng Lin , Chuang-Cheng Yang , Kai-Wei Hong , Chun-Feng Lin
IPC: H01L33/62 , H01L25/075 , H01L27/12
Abstract: A light-emitting device includes a substrate, a circuit array including a plurality of circuit units disposed on the substrate, a first conductive pattern, a second conductive pattern, a first wire pattern, and a second wire pattern disposed on the circuit array, and a light-emitting element disposed on one of the circuit units. The light-emitting element includes a first electrode and a second electrode respectively electrically connected to the first conductive pattern and the second conductive pattern. The second electrode is not overlapped with the first wire pattern and the second wire pattern. A manufacturing method of the light-emitting device is also provided.
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公开(公告)号：US10930239B2
公开(公告)日：2021-02-23
申请号：US16690606
申请日：2019-11-21
Applicant: AU Optronics Corporation
Inventor： Kai-Wei Hong , Chun-Da Tu , Ming-Hsien Lee , Chuang-Cheng Yang , Yi-Cheng Lin , Chun-Feng Lin
Abstract: The present embodiment of the invention provides a gate driving circuit and a display apparatus using the gate driving circuit. The gate driving circuit has a plurality of shift registers, and each shift register includes a first output unit, a first pull-down unit, a second output unit, a second pull-down unit, a voltage coupling unit, and a voltage boosting unit. The first output unit is coupled to a node and a first output end. The second output unit is coupled to the node and a second output end. The first pull-down unit is coupled to the first output end and a reference potential. The second pull-down unit is coupled to the second output end and the reference potential. The voltage coupling unit is coupled between the node and the second output end. The voltage boosting unit is coupled to a preset potential, the first output end, and a node and a gate high potential of a shift register at a previous stage.
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Patent Agency Ranking
公开(公告)号：US10522105B2
公开(公告)日：2019-12-31
申请号：US15953720
申请日：2018-04-16
Applicant: AU Optronics Corporation
Inventor： Kai-Wei Hong , Chun-Da Tu , Ming-Hsien Lee , Chuang-Cheng Yang , Yi-Cheng Lin , Chun-Feng Lin
Abstract: The present embodiment of the invention provides a gate driving circuit and a display apparatus using the gate driving circuit. The gate driving circuit has a plurality of shift registers, and each shift register includes a first output unit, a first pull-down unit, a second output unit, a second pull-down unit, a voltage coupling unit, and a voltage boosting unit. The first output unit is coupled to a node and a first output end. The second output unit is coupled to the node and a second output end. The first pull-down unit is coupled to the first output end and a reference potential. The second pull-down unit is coupled to the second output end and the reference potential. The voltage coupling unit is coupled between the node and the second output end. The voltage boosting unit is coupled to a preset potential, the first output end, and a node and a gate high potential of a shift register at a previous stage.
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公开(公告)号：US20190064978A1
公开(公告)日：2019-02-28
申请号：US16008039
申请日：2018-06-14
Applicant: Au Optronics Corporation
Inventor： Chun-Da Tu , Ming-Hsien Lee , Kai-Wei Hong , Chuang-Cheng Yang , Yi-Cheng Lin , Chun-Feng Lin
Abstract: A shift register and a touch display apparatus thereof are provided. The shift register includes a voltage setting unit, a driving unit, a control unit, a discharge unit, a first compensation transistor, and a second compensation transistor. The voltage setting unit sets a terminal voltage of an internal terminal. The driving unit is coupled to the internal terminal to provide a gate signal and a driving signal. The control unit receives the terminal voltage to provide a control signal. The discharge unit discharges the terminal voltage and the gate signal according to the control signal. The first compensation transistor and the second compensation transistor are coupled in series between a touch enable signal and the internal terminal, and control terminals of the first compensation transistor and the second compensation transistor receive the terminal voltage and the touch enable signal, respectively.
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公开(公告)号：US10019956B2
公开(公告)日：2018-07-10
申请号：US15139827
申请日：2016-04-27
Applicant: AU OPTRONICS CORPORATION
Inventor： Chun-Da Tu , Yung-Chih Chen , Cheng-Han Huang , Kai-Wei Hong , Hsiang-Sheng Chang , Chuang-Cheng Yang
CPC classification number: G09G3/3648 , G09G3/3677 , G09G2300/0408 , G09G2310/0286 , G09G2310/08 , G09G2320/0214 , G11C19/28
Abstract: A shift register including a voltage set unit, a driver unit, a control unit, a first transistor, a second transistor, a third transistor and a fourth transistor is provided. The voltage set unit provides a terminal voltage. The driver unit provides a main gate signal according to the terminal voltage and a clock signal. The control unit provides a control signal. The first transistor receives the terminal voltage, a level reference voltage and the control signal. The second transistor is coupled to the first transistor and receives a low voltage and the control signal. The third transistor receives the terminal voltage, a level reference voltage and a gate reference signal. The fourth transistor is coupled to the third transistor and receives the low voltage and the gate reference signal.
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公开(公告)号：US20170124971A1
公开(公告)日：2017-05-04
申请号：US15139827
申请日：2016-04-27
Applicant: AU OPTRONICS CORPORATION
Inventor： Chun-Da Tu , Yung-Chih Chen , Cheng-Han Huang , Kai-Wei Hong , Hsiang-Sheng Chang , Chuang-Cheng Yang
CPC classification number: G09G3/3648 , G09G3/3677 , G09G2300/0408 , G09G2310/0286 , G09G2310/08 , G09G2320/0214 , G11C19/28
Abstract: A shift register including a voltage set unit, a driver unit, a control unit, a first transistor, a second transistor, a third transistor and a fourth transistor is provided. The voltage set unit provides a terminal voltage. The driver unit provides a main gate signal according to the terminal voltage and a clock signal. The control unit provides a control signal. The first transistor receives the terminal voltage, a level reference voltage and the control signal. The second transistor is coupled to the first transistor and receives a low voltage and the control signal. The third transistor receives the terminal voltage, a level reference voltage and a gate reference signal. The fourth transistor is coupled to the third transistor and receives the low voltage and the gate reference signal.
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公开(公告)号：US11120749B2
公开(公告)日：2021-09-14
申请号：US16708712
申请日：2019-12-10
Applicant: AU Optronics Corporation
Inventor： Chun-Feng Lin , Kai-Wei Hong , Chuang-Cheng Yang , Yi-Cheng Lin , Ming-Hsien Lee
IPC: G09G3/3291 , G09G3/3266
Abstract: A display device includes a driving circuit and a control circuit. The driving circuit is configured to receive a data voltage in response to a scanning signal, and to control the brightness of a light emitting element according to the data voltage. The control circuit is configured to provide a stop signal to the driving circuit in response to a digital signal and the scanning signal, so as to stop the light emitting element from emitting light, and in turn control the light emission period of the light emitting element.
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