公开(公告)号：US20230187364A1

公开(公告)日：2023-06-15

申请号：US17644191

申请日：2021-12-14

Applicant: Advanced Micro Devices, Inc.

Inventor： Chia-Hao Cheng ,  Kong Toon Ng ,  Rahul Agarwal ,  Brett P. Wilkerson

IPC: H01L23/538 ,  H01L21/48

CPC classification number: H01L23/5384 ,  H01L21/486

Abstract: An embodiment of a semiconductor chip device can include a molding layer having a first side and a second side, an interconnect chip at least partially encased in the molding layer, the interconnect chip comprising a through substrate via (TSV) that extends through the interconnect chip, an insulating layer positioned on the first side of the molding layer, and a conductive structure that is positioned vertically below the interconnect chip and extends through the insulating layer, wherein the conductive structure is electrically coupled to the TSV.

公开(公告)号：US11709327B2

公开(公告)日：2023-07-25

申请号：US17361033

申请日：2021-06-28

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Brett P. Wilkerson ,  Raja Swaminathan ,  Kong Toon Ng ,  Rahul Agarwal

IPC: G02B6/42 ,  G02B6/43

CPC classification number: G02B6/4274 ,  G02B6/425 ,  G02B6/4255 ,  G02B6/43

Abstract: A semiconductor package includes a first mold layer at least partially encasing at least one photonic integrated circuit. A redistribution layer structure is fabricated on the first mold layer, the redistribution layer structure including dielectric material and conductive structures. A second mold layer at least partially encasing at least one semiconductor chip is fabricated on the redistribution layer structure. The redistribution layer structure provides electrical pathways between the at least one semiconductor chip and the at least one photonic integrated circuit. One or more voids are defined in the second mold layer in an area above an optical interface of the at least one photonic integrated circuit such that light is transmittable through dielectric material above the optical interface.