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1.发明授权公开(公告)号：US08339303B2
公开(公告)日：2012-12-25
申请号：US13094280
申请日：2011-04-26
IPC分类号： H03M1/34
CPC分类号： H03M1/002 , H03M1/1057 , H03M1/168
摘要： An integrated circuit allows for the isolation of the input of an analog-to-digital converter (ADC) from a summing-node (SNS) algorithm. The integrated circuit contains a gating device that is controlled by bits of a flash analog-to-digital converter (ADC) to gate input samples to sub-ranges that are used by the SNS algorithm. A single sub-range is chosen to be used by the SNS algorithm.
摘要翻译： 集成电路允许从求和节点（SNS）算法隔离模数转换器（ADC）的输入。 该集成电路包含由闪存模数转换器（ADC）的位控制到门输入采样到由SNS算法使用的子范围的门控器件。 选择单个子范围以供SNS算法使用。
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2.发明授权Method for modifying the LMS algorithm to reduce the effect of correlated perturbations 有权修改LMS算法以减少相关扰动影响的方法公开(公告)号：US08358228B2
公开(公告)日：2013-01-22
申请号：US13159679
申请日：2011-06-14
IPC分类号： H03M1/06
CPC分类号： H03M1/1014 , H03M1/0695 , H03M1/168 , H03M1/44
摘要： A process allows for the modification of the least-means-square (LMS) algorithm to remove perturbations associated with measured signals in an analog-to-digital converter (ADC). The process includes measuring the perturbations and determining a coefficient associated with the perturbations. The LMS algorithm is modified in accordance with whether a digital or an analog correction of the inter-stage error of a residue amplifier on the ADC is to be made.
摘要翻译： 一个过程允许修改最小均方（LMS）算法以去除与模数转换器（ADC）中的测量信号相关的扰动。 该过程包括测量扰动并确定与扰动相关联的系数。 根据是否对ADC上的残差放大器的级间误差进行数字或模拟校正来修改LMS算法。
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3.发明授权公开(公告)号：US08471740B2
公开(公告)日：2013-06-25
申请号：US13314451
申请日：2011-12-08
IPC分类号： H03M1/10
CPC分类号： H03M1/0641 , H03M1/0863 , H03M1/167
摘要： A method and device involve a circuit having a switched capacitor network that is switchably connected to an input signal. A randomly determined amount of dither is injected into a circuit having a switched capacitor network that is switchably connected to an input signal. After injecting the dither, at least one correlation value is determined. The correlation value(s) indicates a degree of correlation between the injected dither and an output of the circuit. Distortion caused by an amount of charge kicked back into the circuit when the switched capacitor network is reconnected to the input signal may then be reduced. The reduction is calculated as a function of the correlation value(s).
摘要翻译： 一种方法和装置涉及具有可切换地连接到输入信号的开关电容网络的电路。 将随机确定的抖动量注入到具有可切换地连接到输入信号的开关电容器网络的电路中。 注入抖动后，确定至少一个相关值。 相关值（s）表示注入的抖动与电路的输出之间的相关程度。 然后可以减少当开关电容器网络重新连接到输入信号时由电荷量引起的失真导致的电路失真。 按照相关值（s）的函数计算减少量。
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公开(公告)号：US08866541B2
公开(公告)日：2014-10-21
申请号：US13755908
申请日：2013-01-31
CPC分类号： G05F3/02 , G06F17/5063 , G11C27/02 , H03F1/3252
摘要： Embodiments of the present invention may provide an improved apparatus and method for reducing distortion in analog circuits. A circuit in accordance with the present invention may include a main path comprising an analog circuit with an input impedance, a source impedance representing the impedance of an input network driving the analog circuit, and a cancellation path. The cancellation path may be in parallel to the main path and may generate a cancelling non-linear current to substantially cancel a non-linear current drawn to the input impedance, resulting in a decrease of non-liner current flowing through the source impedance.
摘要翻译： 本发明的实施例可以提供一种用于减少模拟电路中的失真的改进的装置和方法。 根据本发明的电路可以包括主路径，其包括具有输入阻抗的模拟电路，代表驱动模拟电路的输入网络的阻抗的源阻抗以及消除路径。 消除路径可以与主路径平行，并且可以产生抵消非线性电流，以基本上消除吸引到输入阻抗的非线性电流，导致流过源阻抗的非线性电流的减小。
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