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Patent Agency Ranking
公开(公告)号：US20170271972A1
公开(公告)日：2017-09-21
申请号：US15072059
申请日：2016-03-16
Applicant: Analog Devices, Inc.
Inventor： Jun Zhao , Brandon Day
IPC: H02M1/088
CPC classification number: H02M1/088 , G05F1/56 , G05F1/563 , H02M3/155 , H02M2001/0045 , H03F1/0261
Abstract: Apparatus and methods for a bias supply circuit to support power supply including a switched-mode voltage converter cascaded with an n-channel-based linear regulator are provided. In an example, a cascaded power supply system can include a switched-mode DC-to-DC power converter, including an input voltage node, a first stage output voltage node, and a bootstrapped floating bias voltage node, and a linear regulator circuit. The linear regulator circuit can include an n-channel field-effect transistor (NFET) pass transistor, including a drain terminal coupled to the first stage output voltage node, a gate terminal, and a source terminal configured to provide a second-stage output voltage, and a gate driver circuit, including a driver output coupled to the gate terminal of the NFET pass transistor, and a high side supply node configured to receive a bias voltage generated from the bootstrapped floating bias voltage node.
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公开(公告)号：US10243443B2
公开(公告)日：2019-03-26
申请号：US15072059
申请日：2016-03-16
Applicant: Analog Devices, Inc.
Inventor： Jun Zhao , Brandon Day
Abstract: Apparatus and methods for a bias supply circuit to support power supply including a switched-mode voltage converter cascaded with an n-channel-based linear regulator are provided. In an example, a cascaded power supply system can include a switched-mode DC-to-DC power converter, including an input voltage node, a first stage output voltage node, and a bootstrapped floating bias voltage node, and a linear regulator circuit. The linear regulator circuit can include an n-channel field-effect transistor (NFET) pass transistor, including a drain terminal coupled to the first stage output voltage node, a gate terminal, and a source terminal configured to provide a second-stage output voltage, and a gate driver circuit, including a driver output coupled to the gate terminal of the NFET pass transistor, and a high side supply node configured to receive a bias voltage generated from the bootstrapped floating bias voltage node.
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3.发明申请SELF-HEATING TRIM TECHNIQUES FOR IMPROVED LDO ACCURACY OVER LOAD AND TEMPERATURE 有权用于提高LDO精度的加热和温度自加热技术公开(公告)号：US20160070280A1
公开(公告)日：2016-03-10
申请号：US14482228
申请日：2014-09-10
Applicant: Analog Devices, Inc.
Inventor： Brandon Day , Mark Szostkiewicz
Abstract: In one example, a method for compensating for a temperature effect during operation of a voltage regulator circuit includes applying a load current at an output of the voltage regulator circuit, measuring a first output voltage at the output, measuring a reference current or voltage, increasing the load current, measuring a change in the reference current or voltage corresponding to the increased load current, measuring a second output voltage when the measured change in the reference current exceeds a threshold, and determining a temperature coefficient (TC) value based on the measured second output voltage.
Abstract translation: 在一个示例中，用于在电压调节器电路的操作期间补偿温度效应的方法包括在电压调节器电路的输出处施加负载电流，测量输出端的第一输出电压，测量参考电流或电压，增加 负载电流，测量对应于增加的负载电流的参考电流或电压的变化，当所测量的参考电流的变化超过阈值时测量第二输出电压，以及基于所测量的温度系数（TC）值来确定温度系数 第二输出电压。
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公开(公告)号：US10338614B1
公开(公告)日：2019-07-02
申请号：US15961587
申请日：2018-04-24
Applicant: Analog Devices, Inc.
Inventor： Brandon Day , Mukesh Kumar , James R. Dean
Abstract: A voltage regulator circuit having an internally compensated effective series resistance includes a control circuit to generate an out current at a regulated output voltage based on a reference voltage. The control circuit includes an amplifier, a resistive element to feedback output voltage to an input of the amplifier, and a compensation circuit to couple the internally compensated effective series resistance into the control circuit. The compensation circuit includes a first current sense device to generate a first sensed current proportional to a current through an N-type pass device, a second current sense device arranged to generate a second sensed current proportional to the current through the N-type pass device, and a bias circuit coupled to sink the first sensed current and the second sensed current to reduce a bias voltage across the resistive element below a threshold voltage.
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公开(公告)号：US09703306B2
公开(公告)日：2017-07-11
申请号：US14482228
申请日：2014-09-10
Applicant: Analog Devices, Inc.
Inventor： Brandon Day , Mark Szostkiewicz
Abstract: In one example, a method for compensating for a temperature effect during operation of a voltage regulator circuit includes applying a load current at an output of the voltage regulator circuit, measuring a first output voltage at the output, measuring a reference current or voltage, increasing the load current, measuring a change in the reference current or voltage corresponding to the increased load current, measuring a second output voltage when the measured change in the reference current exceeds a threshold, and determining a temperature coefficient (TC) value based on the measured second output voltage.
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