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公开(公告)号：US20250038650A1
公开(公告)日：2025-01-30
申请号：US18360347
申请日：2023-07-27
Applicant: Apple Inc.
Inventor： Yantao Song , Abby Cherian , Qianlai Zhu , Joselito D. Parayno , Bharat K. Patel
Abstract: A power supply can include a bulk capacitor that receives a DC bus voltage; one or more DC-DC converters that convert the DC bus voltage to a DC output voltage; an inrush current limiting circuit that includes a resistor coupled in series with the bulk capacitor so as to limit an inrush current to the bulk capacitor; and a solid-state switching device that selectively bypasses the resistor once the bulk capacitor is charged; and control circuitry that operates the solid-state switching device to selectively bypass the resistor once the bulk capacitor is charged. The inrush current limiting circuit can further include a relay responsive to the control circuitry that selectively bypasses the resistor under high load conditions once the bulk capacitor is charged; and the control circuitry can further operate the solid-state switching device to selectively bypass the resistor once the bulk capacitor is charged under low load conditions.
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公开(公告)号：US10917006B1
公开(公告)日：2021-02-09
申请号：US16671387
申请日：2019-11-01
Applicant: Apple Inc.
Inventor： InHwan Oh , Bharat K. Patel , Abby Cherian
Abstract: A power converter can be configured to convert an AC input voltage into a regulated DC output voltage while maintaining the input current in phase with the rectified AC input voltage. A control circuit of the power converter may be configured to selectively enable switching of at least one switching device of the power converter responsive to a determination that the input voltage is greater than a threshold voltage and to selectively disable switching of the at least one switching device responsive to a determination that the rectified AC input voltage is less than the threshold voltage. The control circuit may be configured to selectively enable and disable switching using an active burst mode signal having a frequency lower than a switching frequency of the converter. The control circuit may be still further configured to operate at least one switching device of the converter in a zero voltage switching condition.
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3.发明申请BLEEDER CIRCUITRY FOR INCREASING LEAKAGE CURRENT DURING HICCUP MODES OF POWER ADAPTERS 有权在电源适配器采集模式中增加泄漏电流的电池电路公开(公告)号：US20130328415A1
公开(公告)日：2013-12-12
申请号：US13648131
申请日：2012-10-09
Applicant: APPLE INC.
Inventor： Kisun Lee , Bharat K. Patel , Abby Cherian
IPC: H02J1/00
CPC classification number: H02J7/022 , H02J9/005 , H02M3/335 , H02M3/337 , H02M2001/0032 , Y02B70/16 , Y10T307/858
Abstract: The disclosed embodiments provide a system that facilitates operation of a power adapter in hiccup mode. The system includes a bleeding mechanism that reduces a hiccup time of the hiccup mode by increasing a leakage current of the power adapter. The system also includes an activation mechanism that activates the bleeding mechanism upon detecting a voltage drop associated with the hiccup mode.
Abstract translation: 所公开的实施例提供了一种便于在打嗝模式下操作电源适配器的系统。 该系统包括出血机制，通过增加电源适配器的泄漏电流来减少打嗝模式的打嗝时间。 该系统还包括激活机构，其在检测到与打嗝模式相关联的电压降时激活出血机制。
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公开(公告)号：US20190260282A1
公开(公告)日：2019-08-22
申请号：US16398505
申请日：2019-04-30
Applicant: Apple Inc.
Inventor： InHwan Oh , Abby Cherian , Manisha Pandya
Abstract: A primary resonant flyback converter may include a primary winding, a resonant capacitor in series with the primary winding, a secondary winding magnetically coupled to the primary winding, and an output electrically coupled to the secondary winding. A main switch may be operated to energize the primary winding when closed and transfer energy stored in the primary winding to the secondary winding when open. An auxiliary switch may be configured to switch complimentarily to the main switch, thereby allowing a resonant current to circulate through the primary winding and capacitor. Switch timing may be controlled to produce a desired output voltage. The converter may also include an input inductor that receives an input voltage, presenting an improved power factor to an AC input power source and in conjunction with the switching devices boosts a rectified AC input voltage to a DC voltage bus of the converter.
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公开(公告)号：US10170974B1
公开(公告)日：2019-01-01
申请号：US15718801
申请日：2017-09-28
Applicant: Apple Inc.
Inventor： InHwan Oh , Abby Cherian , Manisha Pandya
Abstract: A primary resonant flyback converter may include a primary winding, a resonant capacitor in series with the primary winding, a secondary winding magnetically coupled to the primary winding, and an output electrically coupled to the secondary winding. A main switch may be operated to energize the primary winding when closed and transfer energy stored in the primary winding to the secondary winding when open. An auxiliary switch may be configured to switch complimentarily to the main switch, thereby allowing a resonant current to circulate through the primary winding and capacitor. Switch timing may be controlled to produce a desired output voltage. The switching frequency may be varied as a function of output load, input voltage and/or voltage ripple on a DC bus of the converter. Switching may also be temporarily disabled responsive to a decrease in output load and re-enabled responsive to an increase in output load.
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Patent Agency Ranking
公开(公告)号：US20230275521A1
公开(公告)日：2023-08-31
申请号：US17663143
申请日：2022-05-12
Applicant: Apple Inc.
Inventor： Yantao Song , Chanwit Prasantanakorn , Bharat K. Patel , Abby Cherian
CPC classification number: H02M3/33592 , H02M1/4208
Abstract: A power converter can include a rectifier that receives an AC input voltage and produces a rectified output voltage, a power factor correction (PFC) converter having an input coupled that receives the rectified output voltage of the rectifier and an output that provides an intermediate DC bus voltage, a DC-DC converter having an input that receives the intermediate DC bus voltage and produces a regulated DC output voltage, and control circuitry for the PFC converter stage that includes a relatively slower control loop that controls the PFC converter during steady state load conditions and at least one relatively faster control loop that controls the PFC converter during transient load conditions.
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公开(公告)号：US20230275520A1
公开(公告)日：2023-08-31
申请号：US17663141
申请日：2022-05-12
Applicant: Apple Inc.
Inventor： Yantao Song , Chanwit Prasantanakorn , Bharat K Patel , Abby Cherian
IPC: H02M3/335
CPC classification number: H02M3/33592 , H02M1/4225
Abstract: A power converter can include a DC-DC converter having an output with an active power buffer coupled thereto. The active power buffer can include an energy storage capacitor and one or more switching devices selectively coupling the capacitor to the output to alternately store energy in and discharge energy from the capacitor. Control circuitry can include a DC-DC converter control loop that operates the DC-DC converter to regulate an average voltage across the capacitor and an active power buffer control loop that operates the one or more switching devices of the active power buffer to regulate an output voltage of the power converter. The DC-DC converter control loop can include a relatively slower control loop that controls the DC-DC converter during steady state load conditions and at least one relatively faster control loop that controls the DC-DC converter during transient load conditions.
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公开(公告)号：US11095206B2
公开(公告)日：2021-08-17
申请号：US16586588
申请日：2019-09-27
Applicant: Apple Inc.
Inventor： InHwan Oh , Bharat K. Patel , Abby Cherian
Abstract: A power converter can include an input boost converter stage having an input configured to receive a rectified AC input voltage and an output configured to deliver a DC bus voltage and a second switching converter stage having an input configured to receive the DC bus voltage and an output configured to deliver a regulated output voltage. The input boost converter may be configured to be operated in a flat current mode to maintain a substantially constant DC bus voltage over a broad range of AC input voltages. The input boost converter may be further configured to be operated in an active blanking mode, wherein operation of the boost converter is prevented during a controlled blanking interval of each cycle of the rectified AC input voltage. The controlled blanking interval may be increased responsive at least in part to an increase in the AC input voltage and/or may be decreased responsive at least in part to a decrease in the AC input voltage.
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公开(公告)号：US12184186B2
公开(公告)日：2024-12-31
申请号：US17663141
申请日：2022-05-12
Applicant: Apple Inc.
Inventor： Yantao Song , Chanwit Prasantanakorn , Bharat K Patel , Abby Cherian
Abstract: A power converter can include a DC-DC converter having an output with an active power buffer coupled thereto. The active power buffer can include an energy storage capacitor and one or more switching devices selectively coupling the capacitor to the output to alternately store energy in and discharge energy from the capacitor. Control circuitry can include a DC-DC converter control loop that operates the DC-DC converter to regulate an average voltage across the capacitor and an active power buffer control loop that operates the one or more switching devices of the active power buffer to regulate an output voltage of the power converter. The DC-DC converter control loop can include a relatively slower control loop that controls the DC-DC converter during steady state load conditions and at least one relatively faster control loop that controls the DC-DC converter during transient load conditions.
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公开(公告)号：US20210099076A1
公开(公告)日：2021-04-01
申请号：US16586588
申请日：2019-09-27
Applicant: Apple Inc.
Inventor： InHwan Oh , Bharat K. Patel , Abby Cherian
Abstract: A power converter can include an input boost converter stage having an input configured to receive a rectified AC input voltage and an output configured to deliver a DC bus voltage and a second switching converter stage having an input configured to receive the DC bus voltage and an output configured to deliver a regulated output voltage. The input boost converter may be configured to be operated in a flat current mode to maintain a substantially constant DC bus voltage over a broad range of AC input voltages. The input boost converter may be further configured to be operated in an active blanking mode, wherein operation of the boost converter is prevented during a controlled blanking interval of each cycle of the rectified AC input voltage. The controlled blanking interval may be increased responsive at least in part to an increase in the AC input voltage and/or may be decreased responsive at least in part to a decrease in the AC input voltage.
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