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公开(公告)号：US20240136919A1
公开(公告)日：2024-04-25
申请号：US18175848
申请日：2023-02-28
Applicant: Apple Inc.
Inventor： Chanwit Prasantanakorn , Bharat K Patel
IPC: H02M1/42
CPC classification number: H02M1/4225
Abstract: A power factor correction circuit can include an input that receives a rectified AC input voltage; at least one switching device operable to control an input current of the power factor correction circuit to be in phase with the rectified AC input voltage; and control circuitry that controls the at least one switching device to produce a clipped sinusoidal input current, thereby increasing peak load capacity of the power factor correction circuit. The control circuitry can operate the at least one switching device in a critical conduction mode. The power factor correction circuit can further include an inductor having an inductor current therethrough controlled by the at least one switching device and the control circuitry. The inductor can be sized for a peak current corresponding to a peak of the clipped sinusoidal input current.
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Patent Agency Ranking
公开(公告)号：US20240258905A1
公开(公告)日：2024-08-01
申请号：US18162196
申请日：2023-01-31
Applicant: Apple Inc.
Inventor： Chanwit Prasantanakorn , Bharat K Patel
CPC classification number: H02M1/123 , H02M1/4208 , H02M3/01 , H02M3/33571 , H02M7/04
Abstract: A power converter can include a switching bridge having two input terminals that receive an input voltage and a switch node coupled to a primary winding of a transformer; at least one rectifier device coupled between a secondary winding of the transformer and an output of the power converter; and a common mode noise compensation capacitor. A first terminal of the common mode noise compensation capacitor can be coupled to a connection between the secondary winding of the transformer and the at least one rectifier device, and a second terminal of the common mode noise compensation capacitor can be coupled to one of the two input terminals. The common mode noise compensation capacitor can be coupled to an energized or a grounded input terminal. The common mode noise compensation capacitance can be selected to be equal to the turns ratio of the transformer times the parasitic capacitance of the transformer.
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公开(公告)号：US20230275520A1
公开(公告)日：2023-08-31
申请号：US17663141
申请日：2022-05-12
Applicant: Apple Inc.
Inventor： Yantao Song , Chanwit Prasantanakorn , Bharat K Patel , Abby Cherian
IPC: H02M3/335
CPC classification number: H02M3/33592 , H02M1/4225
Abstract: A power converter can include a DC-DC converter having an output with an active power buffer coupled thereto. The active power buffer can include an energy storage capacitor and one or more switching devices selectively coupling the capacitor to the output to alternately store energy in and discharge energy from the capacitor. Control circuitry can include a DC-DC converter control loop that operates the DC-DC converter to regulate an average voltage across the capacitor and an active power buffer control loop that operates the one or more switching devices of the active power buffer to regulate an output voltage of the power converter. The DC-DC converter control loop can include a relatively slower control loop that controls the DC-DC converter during steady state load conditions and at least one relatively faster control loop that controls the DC-DC converter during transient load conditions.
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公开(公告)号：US12184186B2
公开(公告)日：2024-12-31
申请号：US17663141
申请日：2022-05-12
Applicant: Apple Inc.
Inventor： Yantao Song , Chanwit Prasantanakorn , Bharat K Patel , Abby Cherian
Abstract: A power converter can include a DC-DC converter having an output with an active power buffer coupled thereto. The active power buffer can include an energy storage capacitor and one or more switching devices selectively coupling the capacitor to the output to alternately store energy in and discharge energy from the capacitor. Control circuitry can include a DC-DC converter control loop that operates the DC-DC converter to regulate an average voltage across the capacitor and an active power buffer control loop that operates the one or more switching devices of the active power buffer to regulate an output voltage of the power converter. The DC-DC converter control loop can include a relatively slower control loop that controls the DC-DC converter during steady state load conditions and at least one relatively faster control loop that controls the DC-DC converter during transient load conditions.
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公开(公告)号：US11894779B2
公开(公告)日：2024-02-06
申请号：US17663136
申请日：2022-05-12
Applicant: Apple Inc.
Inventor： Chanwit Prasantanakorn , Bharat K Patel
CPC classification number: H02M3/33592 , H02M1/4208 , H02M1/4225 , H02M3/33507 , H02M3/33523 , H02M3/33569
Abstract: A power converter can include a DC-DC converter stage having an input coupled to an input of the power converter and an output coupled to an output of the converter and an active power buffer coupled to the output of the power converter. The active power buffer can further include an energy storage capacitor and one or more switching devices selectively coupling the energy storage capacitor to the output of the power converter so as to alternately store energy in and discharge energy from the energy storage capacitor. Control circuitry of the power converter can include a first control loop that operates the DC-DC converter stage to regulate an average voltage across the energy storage capacitor of the active power buffer and a second control loop that operates the one or more switching devices of the active power buffer to regulate an output voltage of the power converter.
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公开(公告)号：US20230087705A1
公开(公告)日：2023-03-23
申请号：US17655644
申请日：2022-03-21
Applicant: Apple Inc.
Inventor： Chanwit Prasantanakorn , Bharat K Patel
Abstract: A power supply can include a main power converter, a standby converter, and control circuitry that operates the standby converter in a constant voltage regulation mode when a load current of the power supply is below a standby threshold and operates the standby converter in a constant current regulation mode when the load current of the power supply is above the standby threshold. The control circuitry can operate the standby converter in a constant voltage regulation mode to produce a voltage higher than a regulated output voltage of the main power converter. The control circuitry can idle the main power converter when a load current of the power supply is below the standby threshold. The standby threshold can correspond to a constant current limit of a constant current control loop of the standby converter. The control circuitry can employ hysteresis to the standby threshold/constant current control loop.
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