公开(公告)号：US11843387B1

公开(公告)日：2023-12-12

申请号：US17395234

申请日：2021-08-05

Applicant: Apple Inc.

Inventor： Susan A. Thompson ,  Anup K. Sharma ,  Christopher G Zeleznik ,  Harish Venkataraman

IPC: H03L7/085 ,  H03L7/081 ,  H05B47/10

CPC classification number: H03L7/085 ,  H03L7/081 ,  H05B47/10

Abstract: An optoelectronic system includes a transmit side and a receive side. The transmit side and the receive side each include an oversampled phase locked loop configured to receive a decimated system clock signal. Each phase-locked loop is configured to output a high frequency sampling clock signal that, in the case of the transmit side, may be leveraged to generate an arbitrary current waveform that, in turn, can be delayed by a delay-locked loop before being applied to a current-controlled light emitting element. The receive side can generate a clock signal at the same high frequency as the transmit side and can be configured to trigger a reset of the transmit side so that the high frequency clock signals between the transmit and receive sides are synchronized.