Abstract:
An electronic device may be provided with display circuitry that includes a display timing controller, a backlight driver, a light source, and other associated backlight structures. The backlight control circuitry may generate a control signal having an adjustable duty cycle to the backlight driver. The backlight driver may include a boost converter, a current driver, and backlight control circuitry. The current driver may only be activated when the control signal is high. The backlight control circuitry may output an enable signal to the boost converter. The backlight control circuitry may activate the boost converter a predetermined amount of time before each rising clock edge in the control signal by asserting the enable signal for a longer period of time than when the control signal is high. The control signal and the enable signal may be deasserted at around the same times.
Abstract:
A system may include a processor, a graphics controller, and a display. The graphics controller may generate video data to be presented on the display. The display may include a display panel, a backlight unit for providing the display panel with backlight, and a display timing controller for communicating with the graphics controller. The display may be used in non-movie mode and movie mode. The backlight unit may be operated in fixed backlight mode during the non-movie display mode and may be operated in dynamic pixel backlight (DPB) mode during the movie display mode. Backlight level adjustments may be sloped only during the non-movie mode. Backlight level sloping can be handled internally within the backlight unit, can be controlled using pulse width modulation with the display timing controller, and implemented using incremental backlight level adjustments with the processor.
Abstract:
An electronic device may be provided with display circuitry that includes a display timing controller, a backlight driver, a light source, and other associated backlight structures. The backlight control circuitry may generate a control signal having an adjustable duty cycle to the backlight driver. The backlight driver may include a boost converter, a current driver, and backlight control circuitry. The current driver may only be activated when the control signal is high. The backlight control circuitry may output an enable signal to the boost converter. The backlight control circuitry may activate the boost converter a predetermined amount of time before each rising clock edge in the control signal by asserting the enable signal for a longer period of time than when the control signal is high. The control signal and the enable signal may be deasserted at around the same times.
Abstract:
Aspects of the subject technology relate to electronic devices having a display. The display includes a channel of light emitting diodes (LEDs) having controllable brightness levels and control circuitry coupled to the channel of LEDs. The control circuitry provides a pulse width modulated (PWM) signal having a duty cycle to control the brightness levels. An adaptive headroom control circuitry is configured to sense a headroom voltage signal for the channel of LEDs and apply a first time period for blanking the headroom voltage signal during the first time period that is associated with a settling time for the headroom voltage signal.
Abstract:
A system may include a processor, a graphics controller, and a display. The graphics controller may generate video data to be presented on the display. The display may include a display panel, a backlight unit for providing the display panel with backlight, and a display timing controller for communicating with the graphics controller. The display may be used in non-movie mode and movie mode. The backlight unit may be operated in fixed backlight mode during the non-movie display mode and may be operated in dynamic pixel backlight (DPB) mode during the movie display mode. Backlight level adjustments may be sloped only during the non-movie mode. Backlight level sloping can be handled internally within the backlight unit, can be controlled using pulse width modulation with the display timing controller, and implemented using incremental backlight level adjustments with the processor.