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公开(公告)号：US20240077932A1
公开(公告)日：2024-03-07
申请号：US18122410
申请日：2023-03-16
Applicant: Apple Inc.
Inventor： Talbott M. Houk , Wenxun Huang , Nikola Jovanovic , Floyd L. Dankert , Sanjay Pant , Alessandro Molari , Siarhei Meliukh , Nicola Florio , Ludmil N. Nikolov , Nathan F. Hanagami , Hartmut Sturm , Di Zhao , Chad L. Olson , John J. Sullivan , Seyedeh Maryam Mortazavi Zanjani , Tristan R. Hudson , Jay B. Fletcher , Jonathan A. Dutra
IPC: G06F1/3296 , G06F1/3212 , G06F1/3234
CPC classification number: G06F1/3296 , G06F1/3212 , G06F1/3278
Abstract: The present disclosure describes a system with a power management device, a wakeup circuit, a battery management device, and a connector. During a powered down mode of operation, the battery management device can provide, via the connector, a bias voltage to the wakeup circuit. In response to a wakeup switch being activated, the battery management device can provide a power supply (e.g., from a battery) to the power management device. Benefits of the wakeup circuit include (1) a reduction of battery consumption—and thus improving battery lifetime—when the electronic system is in a powered down mode of operation because the wakeup circuit has lower number of active components compared to other designs and (2) a non-complex wakeup circuit design because one or more existing connector interconnects between the power management device and the battery management device can be re-used during electronic system's powered down mode of operation.
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公开(公告)号：US20210247827A1
公开(公告)日：2021-08-12
申请号：US16784605
申请日：2020-02-07
Applicant: Apple Inc.
Inventor： Michael Couleur , Nicola Rasera , Siarhei Meliukh
Abstract: A power converter circuit that includes a switch circuit, and multiple phase and amplifier circuits, may generate a voltage level on a regulated power supply node of a computer system. The amplifier circuits may generate respective demand currents using a voltage level of the regulated power supply node and a reference voltage. In response to activation of a multi-phase operating mode, the switch circuit may short the outputs of the amplifier circuits to generate a common demand current. The multiple phase circuits may sequentially source current to regulated power supply node using the common demand current.
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公开(公告)号：US20210126539A1
公开(公告)日：2021-04-29
申请号：US17065984
申请日：2020-10-08
Applicant: Apple Inc.
Inventor： Michael Couleur , Nicola Rasera , Siarhei Meliukh
IPC: H02M3/158
Abstract: A DC-DC converter that provides both buck and boost voltages using a single inductor is disclosed. The DC-DC converter includes an H-bridge circuit having an inductor having first and second terminals, and a number of switches. The switches include a first switch coupled between the second inductor terminal and a boost voltage node, a second switch coupled between the second inductor terminal and a buck voltage node, and a third switch coupled between the first inductor terminal and an input voltage node. A control circuit is coupled to activate the switches in accordance with a number of different phases such that a buck voltage (e.g., less than the input voltage) is provided on the buck voltage node, while a boost voltage (e.g., greater than the input voltage) is provided on the boost voltage node.
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公开(公告)号：US12081226B2
公开(公告)日：2024-09-03
申请号：US17931065
申请日：2022-09-09
Applicant: Apple Inc.
Inventor： Giovanni Saccomanno , Alberto Celin , Fabio Busignani , Siarhei Meliukh
CPC classification number: H03M1/181 , H03M1/001 , H03M1/1071 , H03M1/34
Abstract: A tracking ADC with a feed-forward loop is disclosed. The tracking ADC includes a feedback circuit configured to generate a feedback signal using an input voltage and a comparison circuit configured to sample, using a plurality of threshold values, the feedback signal to generate a plurality of samples. A counter circuit is configured to update a count value using a subset of the plurality of samples. A digital-to-analog converter (DAC) circuit configured to generate a control signal using the count value. The feedback circuit is further configured to modify the feedback signal using the control signal and at least one of the plurality of samples. By modifying the feedback voltage, the settling time may be reduced, allowing the ADC to be run at a higher clock speed.
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公开(公告)号：US11777398B2
公开(公告)日：2023-10-03
申请号：US17144902
申请日：2021-01-08
Applicant: Apple Inc.
Inventor： Giulio Maria Iadicicco , Michael Couleur , Siarhei Meliukh
IPC: H02M1/08 , H03K17/687 , H02M3/158 , H03K17/06 , H02M1/00
CPC classification number: H02M1/08 , H02M3/158 , H03K17/6872 , H02M1/0006 , H03K17/063
Abstract: Circuitry for bootstrapping and precharging a gate of a field-effect transistor (FET) is disclosed. In one embodiment, an apparatus includes a first transistor coupled to a switching node and further coupled to receive a supply voltage from a supply voltage node, and a second transistor coupled between the switching node and a ground node, wherein the first and second transistors are of a same type. A precharge circuit is configured to precharge a gate terminal of the first transistor to a voltage that is less than a supply voltage on the voltage supply node. The apparatus also includes a bootstrap circuit. Subsequent to precharging the gate terminal of the first transistor, the bootstrap circuit is configured to cause activation of the first transistor by charging the gate terminal to a voltage greater than the supply voltage.
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Patent Agency Ranking
公开(公告)号：US11552563B2
公开(公告)日：2023-01-10
申请号：US16951678
申请日：2020-11-18
Applicant: Apple Inc.
Inventor： Nikola Jovanovic , Michael Couleur , Siarhei Meliukh
Abstract: A power converter is disclosed. The power converter is configured to provide a regulated output voltage. The power converter includes a first control loop configured to generate a first voltage based on a rate of change of the regulated output voltage. A second control loop is configured to generate a second voltage based on an output current provided by the power converter. An amplifier is configured to generate a third voltage based on the first and second voltages. A control circuit is configured to control the regulated output voltage based on the third voltage.
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公开(公告)号：US20220224216A1
公开(公告)日：2022-07-14
申请号：US17144902
申请日：2021-01-08
Applicant: Apple Inc.
Inventor： Giulio Maria Iadicicco , Michael Couleur , Siarhei Meliukh
IPC: H02M1/08 , H02M3/158 , H03K17/687
Abstract: Circuitry for bootstrapping and precharging a gate of a field-effect transistor (FET) is disclosed. In one embodiment, an apparatus includes a first transistor coupled to a switching node and further coupled to receive a supply voltage from a supply voltage node, and a second transistor coupled between the switching node and a ground node, wherein the first and second transistors are of a same type. A precharge circuit is configured to precharge a gate terminal of the first transistor to a voltage that is less than a supply voltage on the voltage supply node. The apparatus also includes a bootstrap circuit. Subsequent to precharging the gate terminal of the first transistor, the bootstrap circuit is configured to cause activation of the first transistor by charging the gate terminal to a voltage greater than the supply voltage.
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公开(公告)号：US11086378B1
公开(公告)日：2021-08-10
申请号：US16784605
申请日：2020-02-07
Applicant: Apple Inc.
Inventor： Michael Couleur , Nicola Rasera , Siarhei Meliukh
Abstract: A power converter circuit that includes a switch circuit, and multiple phase and amplifier circuits, may generate a voltage level on a regulated power supply node of a computer system. The amplifier circuits may generate respective demand currents using a voltage level of the regulated power supply node and a reference voltage. In response to activation of a multi-phase operating mode, the switch circuit may short the outputs of the amplifier circuits to generate a common demand current. The multiple phase circuits may sequentially source current to regulated power supply node using the common demand current.
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公开(公告)号：US10903741B1
公开(公告)日：2021-01-26
申请号：US16816227
申请日：2020-03-11
Applicant: Apple Inc.
Inventor： Michael Couleur , Nikola Javanovic , Siarhei Meliukh
Abstract: A power converter circuit included in a computer system may include an adiabatic charge pump which includes multiple capacitors different numbers of which are used to charge and discharge a switch node coupled to regulated power supply node via an inductor. A control circuit may control the dividing ratio of the charge pump circuit as well as determine respective durations of when the charge pump circuit is charging and discharging the switch node.
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公开(公告)号：US20240088909A1
公开(公告)日：2024-03-14
申请号：US17931065
申请日：2022-09-09
Applicant: Apple Inc.
Inventor： Giovanni Saccomanno , Alberto Celin , Fabio Busignani , Siarhei Meliukh
CPC classification number: H03M1/181 , H03M1/001 , H03M1/1071 , H03M1/34
Abstract: A tracking ADC with a feed-forward loop is disclosed. The tracking ADC includes a feedback circuit configured to generate a feedback signal using an input voltage and a comparison circuit configured to sample, using a plurality of threshold values, the feedback signal to generate a plurality of samples. A counter circuit is configured to update a count value using a subset of the plurality of samples. A digital-to-analog converter (DAC) circuit configured to generate a control signal using the count value. The feedback circuit is further configured to modify the feedback signal using the control signal and at least one of the plurality of samples. By modifying the feedback voltage, the settling time may be reduced, allowing the ADC to be run at a higher clock speed.
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