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公开(公告)号：US20240214018A1
公开(公告)日：2024-06-27
申请号：US18145423
申请日：2022-12-22
Applicant: Apple Inc.
Inventor： Simone Gambini
Abstract: An electronic device may include a receiver that receives radio-frequency signals using an antenna. The receiver may include a passive voltage mode mixer coupled to a passive second-or-higher order switched-capacitor filter with complex poles. Clocking circuitry may provide a control signal to the filter to cycle the filter through a series of states, may provide first and second local oscillator (LO) signals to the mixer, and may synchronize timing of the control signal with the first and second LO signals. The first and second LO signals may have the same period but may be shifted in time by half the period. The period may be equal to the duration with which the filter is placed in each of the states. The clocking circuitry may pulse the first and second LO signals once while the filter is placed in each of the states.
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公开(公告)号：US20210336624A1
公开(公告)日：2021-10-28
申请号：US16855828
申请日：2020-04-22
Applicant: Apple Inc.
Inventor： Long Kong , Simone Gambini , Cristian Marcu , Nachum M. Kanovsky
Abstract: A computer system may periodically calibrate an oscillator subsystem, which includes a voltage-controlled oscillator circuit configured to generate an oscillator signal using code signal. In response to activation of a calibration mode, an iterative calibration operation may be performed on the voltage-controlled oscillator circuit. In some cases, performing a given iteration of the calibration operation includes determining a value of the code signal using a number of pulses in the oscillator signal sampled during a particular time period, along with previous values of the code signal and a slope of an error function associated with the difference between a desired frequency and a current frequency of the oscillator signal. In other cases, iterations may employ variable sampling times with error handling, in order to decrease the duration of the calibration operation while maintaining a target accuracy.
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公开(公告)号：US10804912B2
公开(公告)日：2020-10-13
申请号：US16057807
申请日：2018-08-07
Applicant: Apple Inc.
Inventor： Utku Seckin , Simone Gambini , Benjamin W. Cook
Abstract: A non-integer divider for dividing the frequency of a signal is disclosed. A non-integer divider includes a first divider that divides the frequency of a first signal. A mixer is coupled to receive the first signal, and a second signal having a frequency equivalent to that output by the first divider. The mixer outputs a third signal having a frequency based on respective frequencies of the first and second signal. A second divider receives and frequency divides the third signal to produce a fourth signal. A ratio of the frequency of the first signal to the fourth signal is a non-integer value.
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公开(公告)号：US20250105808A1
公开(公告)日：2025-03-27
申请号：US18373057
申请日：2023-09-26
Applicant: Apple Inc.
Inventor： Long Kong , Simone Gambini
Abstract: Embodiments herein provide various apparatuses and techniques to reduce flicker noise and voltage offset from the buffers and/or amplifiers while avoiding additional alias components in a sampled-data receiver with chopper stabilization. Additionally, a direct-conversion baseband chain may be improved by disposing alternating current (AC) coupling circuits between chopper circuits in the transmitter or receiver chain to enable selection of a distinct common-mode level at each stage of the direct-conversion chain, while reducing or eliminating signal loss at direct current (DC) frequencies.
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公开(公告)号：US10756744B1
公开(公告)日：2020-08-25
申请号：US16515961
申请日：2019-07-18
Applicant: Apple Inc.
Inventor： Utku Seckin , Simone Gambini , Michael D. Scott
Abstract: Various embodiments of a segmented R-DAC are disclosed. In one embodiment, a segmented R-DAC includes first and second DACs arranged to receive most and least significant bits, respectively. The segmented R-DAC also includes a first capacitor coupled between an output of the first DAC and an output of the second DAC, and a second capacitor coupled between the output of the second DAC and a ground node. The capacitance of the second capacitor has a value that is a predetermined multiple of the capacitance value of the first capacitor.
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Patent Agency Ranking
公开(公告)号：US20200052708A1
公开(公告)日：2020-02-13
申请号：US16057807
申请日：2018-08-07
Applicant: Apple Inc.
Inventor： Utku Seckin , Simone Gambini , Benjamin W. Cook
Abstract: A non-integer divider for dividing the frequency of a signal is disclosed. A non-integer divider includes a first divider that divides the frequency of a first signal. A mixer is coupled to receive the first signal, and a second signal having a frequency equivalent to that output by the first divider. The mixer outputs a third signal having a frequency based on respective frequencies of the first and second signal. A second divider receives and frequency divides the third signal to produce a fourth signal. A ratio of the frequency of the first signal to the fourth signal is a non-integer value.
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公开(公告)号：US20240267010A1
公开(公告)日：2024-08-08
申请号：US18106899
申请日：2023-02-07
Applicant: Apple Inc.
Inventor： Simone Gambini
CPC classification number: H03F3/245 , H04B1/40 , H03F2200/451 , H03F2203/21151
Abstract: This disclosure is directed to a power amplifier (PA) including circuitry to amplify and filter transmission signals in a radio frequency (RF) circuit. The PA may include multiple core amplifiers coupled to a power combiner to amplify and filter the transmission signals. For example, the PA may activate the core amplifiers to provide the transmission signals with a peak output power. Alternatively, the PA may activate a reduced number of the core amplifiers to provide the transmission signals with a reduced output power lower than the peak output power. Activating a portion of the PA when providing the transmission signals with a reduced output power may reduce a power consumption and improve power efficiency of the PA.
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公开(公告)号：US20230084706A1
公开(公告)日：2023-03-16
申请号：US17947739
申请日：2022-09-19
Applicant: Apple Inc.
Inventor： Long Kong , Simone Gambini , Utku Seckin
Abstract: An electronic device may include wireless circuitry with processor circuitry, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as low noise amplifier circuitry for amplifying received radio-frequency signals. The amplifier circuitry may include an amplifier having an input and an output, an adjustable load component coupled to the input, and an adjustable feedback component coupled across the input and output. A control circuit may simultaneously adjust the load and feedback components to tune the gain of the amplifier circuitry while maintaining the input resistance at a desired target level. The load and feedback components can be the same or different types of adjustable passive components.
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公开(公告)号：US11031943B1
公开(公告)日：2021-06-08
申请号：US16811459
申请日：2020-03-06
Applicant: Apple Inc.
Inventor： Simone Gambini , Chin-Chi Chen , Axel D. Berny
Abstract: A frequency synthesizer circuit included in a sensor circuit of a computer system may include a voltage-controlled oscillator circuit that may generate an oscillator signal. A three-point injection technique may be used to modulate the frequency of the oscillator signal. The three-point injection includes a low-frequency component that drives a feedback divider, and two high-frequency components that drive the voltage-controlled oscillator circuit. The strengths of the three injection points are aligned using samples of a tune signal generated using results of a comparison of a referenced signal and a frequency divided version of the oscillator signal.
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公开(公告)号：US10735035B1
公开(公告)日：2020-08-04
申请号：US16298610
申请日：2019-03-11
Applicant: Apple Inc.
Inventor： Simone Gambini
Abstract: A sensor circuit included in a computer system may include multiple antennas, a control circuit, a mixer circuit, a transmitter circuit and a filter circuit. The control circuit may generate a baseband signal, which the mixer circuit may modulate using a modulation signal to generate a transmit signal. The transmitter circuit may transmit the transmit signal using a first antenna. The filter circuit may be configured to track a carrier frequency of the transmit signal and filter a reflected version of the transmit signal to generate an output signal.
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