公开(公告)号：US20190244894A1

公开(公告)日：2019-08-08

申请号：US15890135

申请日：2018-02-06

Applicant: Apple Inc.

Inventor： Yi Chun A. Fu ,  Mansour Keramat ,  Vijay Srinivas

IPC: H01L23/522 ,  H01G4/01 ,  H01G4/228 ,  H01G4/06 ,  H01G4/38 ,  H03M1/20 ,  H03M1/46 ,  H01L49/02

Abstract: Capacitor structures with pitch-matched capacitor unit cells are described. In an embodiment, the capacitor unit cells are formed by interdigitated finger electrodes. The finger electrodes may be pitch-matched in multiple metal layers within a capacitor unit cell, and the finger electrodes may be pitch-matched among an array of capacitor unit cells. Additionally, border unit cells may be pitch-matched with the capacitor unit cells.

公开(公告)号：US09893737B1

公开(公告)日：2018-02-13

申请号：US15406077

申请日：2017-01-13

Applicant: Apple Inc.

Inventor： Mansour Keramat ,  KiYoung Nam ,  Vijay Srinivas

IPC: H03M1/06 ,  H03M1/12 ,  H03K5/24 ,  H03K5/08

CPC classification number: H03M1/124 ,  H03K5/08 ,  H03K5/24

Abstract: An apparatus includes a series of analog-to-digital converter (ADC) stages and a comparison circuit coupled to a first ADC stage. The first ADC stage may be configured to compare an input signal to one or more conversion thresholds to generate a result. The first ADC stage may also be configured to generate an output signal based on a value of the result. In response to an assertion of a reset signal, the first ADC stage may be configured to set a level of the output signal voltage to a particular voltage. The comparison circuit may be configured to assert the reset signal in response to a determination that the input signal voltage exceeds an operating range defined by an upper overload threshold voltage and a lower overload threshold voltage.

公开(公告)号：US10707162B2

公开(公告)日：2020-07-07

申请号：US16599011

申请日：2019-10-10

Applicant: Apple Inc.

Inventor： Yi Chun A. Fu ,  Mansour Keramat ,  Vijay Srinivas

IPC: H01L23/522 ,  H01G4/01 ,  H01G4/228 ,  H01L49/02 ,  H01G4/38 ,  H03M1/20 ,  H03M1/46 ,  H01G4/06 ,  H03M1/80

Abstract: Capacitor structures with pitch-matched capacitor unit cells are described. In an embodiment, the capacitor unit cells are formed by interdigitated finger electrodes. The finger electrodes may be pitch-matched in multiple metal layers within a capacitor unit cell, and the finger electrodes may be pitch-matched among an array of capacitor unit cells. Additionally, border unit cells may be pitch-matched with the capacitor unit cells.

公开(公告)号：US09418788B2

公开(公告)日：2016-08-16

申请号：US14643478

申请日：2015-03-10

Applicant: Apple Inc.

Inventor： Vijay Srinivas ,  Mansour Keramat ,  Yuan-Ju Chao

IPC: H03M1/66 ,  H01G4/01 ,  H01G4/228 ,  H01G4/38 ,  H01G4/12 ,  H03M1/46

CPC classification number: H01G4/01 ,  H01G4/129 ,  H01G4/228 ,  H01G4/38 ,  H03M1/468

Abstract: A capacitive device is disclosed, including a first conductor formed on a lower metal layer and coupled to a first terminal. A second conductor is formed on an upper metal layer and a plurality of wires is partitioned into groups, each group including one wire from a respective metal layer. First and second wires of each group are coupled to a second terminal. A third wire of each group, adjacent to the first wire, is coupled to the first conductor. A fourth wire of each group, adjacent to the second wire, is coupled to the second conductor. Fifth wires of a first subset of the groups are coupled to the second conductor and fifth wires of a second subset of the groups are coupled to the first conductor. The fifth wire of each group is adjacent to the first wire and the second wire.

Abstract translation: 公开了一种电容器件，包括形成在下金属层上并耦合到第一端子的第一导体。 第二导体形成在上金属层上，并且多根导线分成一组，每组包括来自相应金属层的一根导线。 每组的第一和第二导线耦合到第二端子。 与第一导线相邻的每个组的第三线耦合到第一导体。 与第二导线相邻的每组的第四线耦合到第二导体。 组的第一子集的第五线耦合到第二导体，并且组的第二子集的第五线耦合到第一导体。 每组的第五根线与第一线和第二线相邻。

公开(公告)号：US20150263754A1

公开(公告)日：2015-09-17

申请号：US14643478

申请日：2015-03-10

Applicant: Apple Inc.

Inventor： Vijay Srinivas ,  Mansour Keramat ,  Yuan-Ju Chao

IPC: H03M1/46 ,  H01G4/01 ,  H01G4/12 ,  H01G4/228

CPC classification number: H01G4/01 ,  H01G4/129 ,  H01G4/228 ,  H01G4/38 ,  H03M1/468

Abstract: A capacitive device is disclosed, including a first conductor formed on a lower metal layer and coupled to a first terminal. A second conductor is formed on an upper metal layer and a plurality of wires is partitioned into groups, each group including one wire from a respective metal layer. First and second wires of each group are coupled to a second terminal. A third wire of each group, adjacent to the first wire, is coupled to the first conductor. A fourth wire of each group, adjacent to the second wire, is coupled to the second conductor. Fifth wires of a first subset of the groups are coupled to the second conductor and fifth wires of a second subset of the groups are coupled to the first conductor. The fifth wire of each group is adjacent to the first wire and the second wire.

Abstract translation: 公开了一种电容器件，包括形成在下金属层上并耦合到第一端子的第一导体。 第二导体形成在上金属层上，并且多根导线分成一组，每组包括来自相应金属层的一根导线。 每组的第一和第二导线耦合到第二端子。 与第一导线相邻的每个组的第三线耦合到第一导体。 与第二导线相邻的每组的第四线耦合到第二导体。 组的第一子集的第五条线耦合到第二导体，并且组的第二子集的第五条线耦合到第一导体。 每组的第五根线与第一线和第二线相邻。

公开(公告)号：US10453791B2

公开(公告)日：2019-10-22

申请号：US15890135

申请日：2018-02-06

Applicant: Apple Inc.

Inventor： Yi Chun A. Fu ,  Mansour Keramat ,  Vijay Srinivas

IPC: H01L23/522 ,  H01G4/01 ,  H01G4/228 ,  H01L49/02 ,  H01G4/38 ,  H03M1/20 ,  H03M1/46 ,  H01G4/06

Abstract: Capacitor structures with pitch-matched capacitor unit cells are described. In an embodiment, the capacitor unit cells are formed by interdigitated finger electrodes. The finger electrodes may be pitch-matched in multiple metal layers within a capacitor unit cell, and the finger electrodes may be pitch-matched among an array of capacitor unit cells. Additionally, border unit cells may be pitch-matched with the capacitor unit cells.

公开(公告)号：US10937730B2

公开(公告)日：2021-03-02

申请号：US16883831

申请日：2020-05-26

Applicant: Apple Inc.

Inventor： Yi Chun A. Fu ,  Mansour Keramat ,  Vijay Srinivas

IPC: H01L23/522 ,  H01G4/01 ,  H01G4/228 ,  H01L49/02 ,  H01G4/38 ,  H03M1/20 ,  H03M1/46 ,  H01G4/06 ,  H03M1/80

Abstract: Capacitor structures with pitch-matched capacitor unit cells are described. In an embodiment, the capacitor unit cells are formed by interdigitated finger electrodes. The finger electrodes may be pitch-matched in multiple metal layers within a capacitor unit cell, and the finger electrodes may be pitch-matched among an array of capacitor unit cells. Additionally, border unit cells may be pitch-matched with the capacitor unit cells.

公开(公告)号：US20200286824A1

公开(公告)日：2020-09-10

申请号：US16883831

申请日：2020-05-26

Applicant: Apple Inc.

Inventor： Yi Chun A. Fu ,  Mansour Keramat ,  Vijay Srinivas

IPC: H01L23/522 ,  H01G4/01 ,  H01G4/228 ,  H01L49/02 ,  H01G4/38 ,  H03M1/20 ,  H03M1/46 ,  H01G4/06 ,  H03M1/80

Abstract: Capacitor structures with pitch-matched capacitor unit cells are described. In an embodiment, the capacitor unit cells are formed by interdigitated finger electrodes. The finger electrodes may be pitch-matched in multiple metal layers within a capacitor unit cell, and the finger electrodes may be pitch-matched among an array of capacitor unit cells. Additionally, border unit cells may be pitch-matched with the capacitor unit cells.

公开(公告)号：US20200043846A1

公开(公告)日：2020-02-06

申请号：US16599011

申请日：2019-10-10

Applicant: Apple Inc.

Inventor： Yi Chun A. Fu ,  Mansour Keramat ,  Vijay Srinivas

IPC: H01L23/522 ,  H01G4/01 ,  H01G4/228 ,  H01L49/02 ,  H01G4/38 ,  H03M1/20 ,  H03M1/46 ,  H01G4/06 ,  H03M1/80

Abstract: Capacitor structures with pitch-matched capacitor unit cells are described. In an embodiment, the capacitor unit cells are formed by interdigitated finger electrodes. The finger electrodes may be pitch-matched in multiple metal layers within a capacitor unit cell, and the finger electrodes may be pitch-matched among an array of capacitor unit cells. Additionally, border unit cells may be pitch-matched with the capacitor unit cells.