公开(公告)号：US06284576B1

公开(公告)日：2001-09-04

申请号：US09196229

申请日：1998-11-20

申请人： Atsushi Ban ,  Hisataka Suzuki ,  Masaya Okamoto

发明人： Atsushi Ban ,  Hisataka Suzuki ,  Masaya Okamoto

IPC分类号： H01L2100

CPC分类号： H01L29/66765

摘要： A thin-film transistor of the reversed stagger type is provided with a gate electrode, first and second gate insulating films, a semiconductor layer, separated contact layers, and source electrodes and drain electrodes, all of which are stacked on a substrate. Upon manufacturing the thin-film transistor of this type, a gap section is pattered in a single contact-material layer. In this case, the contact-material layer is patterned by a dry etching with etching gases including HCl+SF6 or CF4+O2+HCl by the use of the source electrode and drain electrode as direct masks. Upon patterning a gap section in the contact-material layer between the source electrode and the drain electrode, no dedicated resist pattern is required; therefore, it is possible to reduce the number of the processes as compared with conventional manufacturing methods. Consequently, it becomes possible to reduce the production cost of thin-film transistors and also to improve the yield of desired products.

摘要翻译： 反向交错型薄膜晶体管设置有栅电极，第一和第二栅极绝缘膜，半导体层，分离的接触层以及源极和漏极，所有这些都堆叠在基板上。 在制造这种类型的薄膜晶体管时，在单个接触材料层中将间隙部分图案化。 在这种情况下，通过使用源电极和漏电极作为直接掩模的蚀刻气体，包括HCl + SF6或CF4 + O2 + HCl的干法蚀刻来对接触材料层进行构图。 在图案化源电极和漏电极之间的接触材料层中的间隙部分时，不需要专用抗蚀剂图案; 因此，与传统的制造方法相比，可以减少处理次数。 因此，可以降低薄膜晶体管的生产成本，并且还可以提高所需产品的产量。

公开(公告)号：US5953583A

公开(公告)日：1999-09-14

申请号：US887136

申请日：1997-07-02

申请人： Atsushi Ban ,  Hisataka Suzuki ,  Masaya Okamoto

发明人： Atsushi Ban ,  Hisataka Suzuki ,  Masaya Okamoto

IPC分类号： H01L21/302 ,  H01L21/3065 ,  H01L21/336 ,  H01L29/786 ,  H01L21/306 ,  H01L21/84

CPC分类号： H01L29/66765

摘要： A thin-film transistor of the reversed stagger type is provided with a gate electrode, first and second gate insulating films, a semiconductor layer, separated contact layers, and source electrodes and drain electrodes, all of which are stacked on a substrate. Upon manufacturing the thin-film transistor of this type, a gap section is pattered in a single contact-material layer. In this case, the contact-material layer is patterned by carrying out etching by the use of the source electrode and drain electrode as direct masks or by the use of a resist pattern that was used for forming the respective electrodes. Upon patterning a gap section in the contact-material layer between the source electrode and the drain electrode, no dedicated resist pattern is required; therefore, it is possible to reduce the number of the processes as compared with conventional manufacturing methods. Consequently, it becomes possible to reduce the production cost of thin-film transistors and also to improve the yield of desired products.

摘要翻译： 反向交错型薄膜晶体管设置有栅电极，第一和第二栅极绝缘膜，半导体层，分离的接触层以及源极和漏极，所有这些都堆叠在基板上。 在制造这种类型的薄膜晶体管时，在单个接触材料层中将间隙部分图案化。 在这种情况下，通过使用源电极和漏电极作为直接掩模或通过使用用于形成各个电极的抗蚀剂图案进行蚀刻来对接触材料层进行图案化。 在图案化源电极和漏电极之间的接触材料层中的间隙部分时，不需要专用抗蚀剂图案; 因此，与传统的制造方法相比，可以减少处理次数。 因此，可以降低薄膜晶体管的生产成本，并且还可以提高所需产品的产量。

公开(公告)号：US20090026457A1

公开(公告)日：2009-01-29

申请号：US12283893

申请日：2008-09-16

申请人： Yoshihiro Okada ,  Yuichi Saito ,  Shinya Yamakawa ,  Atsushi Ban ,  Masaya Okamoto ,  Hiroyuki Ohgami

发明人： Yoshihiro Okada ,  Yuichi Saito ,  Shinya Yamakawa ,  Atsushi Ban ,  Masaya Okamoto ,  Hiroyuki Ohgami

IPC分类号： H01L33/00 ,  H01L21/00

CPC分类号： H01L29/78603 ,  G02F1/1362 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66765

摘要： An active matrix substrate includes base substrate, gate lines, data lines, thin-film transistors and pixel electrodes. The gate lines are formed on the base substrate. The data lines are formed over the gate lines. Each of the data lines crosses all of the gate lines with an insulating film interposed therebetween. The thin-film transistors are formed over the base substrate. Each of the thin-film transistors is associated with one of the gate lines and operates responsive to a signal on the associated gate line. Each of the pixel electrodes is associated with one of the data lines and one of the thin-film transistors and is electrically connectable to the associated data line by way of the associated thin-film transistor. Each of the pixel electrodes and the associated thin-film transistor are connected together by way of a conductive member. Each of the pixel electrodes crosses one of the gate lines, while the conductive member for the pixel electrode crosses another one of the gate lines that is adjacent to the former gate line.

公开(公告)号：US08304297B2

公开(公告)日：2012-11-06

申请号：US12807215

申请日：2010-08-31

申请人： Yoshihiro Okada ,  Yuichi Saito ,  Shinya Yamakawa ,  Atsushi Ban ,  Masaya Okamoto ,  Hiroyuki Ohgami

发明人： Yoshihiro Okada ,  Yuichi Saito ,  Shinya Yamakawa ,  Atsushi Ban ,  Masaya Okamoto ,  Hiroyuki Ohgami

IPC分类号： H01L21/82

CPC分类号： H01L29/78603 ,  G02F1/1362 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66765

摘要： An active matrix substrate includes base substrate, gate lines, data lines, thin-film transistors and pixel electrodes. The gate lines are formed on the base substrate. The data lines are formed over the gate lines. Each of the data lines crosses all of the gate lines with an insulating film interposed therebetween. The thin-film transistors are formed over the base substrate. Each of the thin-film transistors is associated with one of the gate lines and operates responsive to a signal on the associated gate line. Each of the pixel electrodes is associated with one of the data lines and one of the thin-film transistors and is electrically connectable to the associated data line by way of the associated thin-film transistor. Each of the pixel electrodes and the associated thin-film transistor are connected together by way of a conductive member. Each of the pixel electrodes crosses one of the gate lines, while the conductive member for the pixel electrode crosses another one of the gate lines that is adjacent to the former gate line.

摘要翻译： 有源矩阵基板包括基底，栅线，数据线，薄膜晶体管和像素电极。 栅极线形成在基底基板上。 数据线形成在栅极线上。 每条数据线都插入绝缘膜，与所有栅极线交叉。 薄膜晶体管形成在基底基板上。 每个薄膜晶体管与一条栅极线路相关联，并且响应于相关联的栅极线上的信号而工作。 每个像素电极与数据线之一和薄膜晶体管中的一个相关联，并且可通过相关联的薄膜晶体管电连接到相关联的数据线。 每个像素电极和相关联的薄膜晶体管通过导电构件连接在一起。 每个像素电极与一条栅极线交叉，而用于像素电极的导电构件与另一条与前一栅极线相邻的栅极线交叉。

公开(公告)号：US07829391B2

公开(公告)日：2010-11-09

申请号：US12658555

申请日：2010-02-11

申请人： Yoshihiro Okada ,  Yuichi Saito ,  Shinya Yamakawa ,  Atsushi Ban ,  Masaya Okamoto ,  Hiroyuki Ohgami

发明人： Yoshihiro Okada ,  Yuichi Saito ,  Shinya Yamakawa ,  Atsushi Ban ,  Masaya Okamoto ,  Hiroyuki Ohgami

IPC分类号： H01L21/82

CPC分类号： H01L29/78603 ,  G02F1/1362 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66765

摘要： An active matrix substrate includes base substrate, gate lines, data lines, thin-film transistors and pixel electrodes. The gate lines are formed on the base substrate. The data lines are formed over the gate lines. Each of the data lines crosses all of the gate lines with an insulating film interposed therebetween. The thin-film transistors are formed over the base substrate. Each of the thin-film transistors is associated with one of the gate lines and operates responsive to a signal on the associated gate line. Each of the pixel electrodes is associated with one of the data lines and one of the thin-film transistors and is electrically connectable to the associated data line by way of the associated thin-film transistor. Each of the pixel electrodes and the associated thin-film transistor are connected together by way of a conductive member. Each of the pixel electrodes crosses one of the gate lines, while the conductive member for the pixel electrode crosses another one of the gate lines that is adjacent to the former gate line.

摘要翻译： 有源矩阵基板包括基底，栅线，数据线，薄膜晶体管和像素电极。 栅极线形成在基底基板上。 数据线形成在栅极线上。 每条数据线都插入绝缘膜，与所有栅极线交叉。 薄膜晶体管形成在基底基板上。 每个薄膜晶体管与一条栅极线路相关联，并且响应于相关联的栅极线上的信号而工作。 每个像素电极与数据线之一和薄膜晶体管中的一个相关联，并且可通过相关联的薄膜晶体管电连接到相关联的数据线。 每个像素电极和相关联的薄膜晶体管通过导电构件连接在一起。 每个像素电极与一条栅极线交叉，而用于像素电极的导电构件与另一条与前一栅极线相邻的栅极线交叉。

公开(公告)号：US06797982B2

公开(公告)日：2004-09-28

申请号：US09939479

申请日：2001-08-24

申请人： Yoshihiro Okada ,  Yuichi Saito ,  Shinya Yamakawa ,  Atsushi Ban ,  Masaya Okamoto ,  Hiroyuki Ohgami

发明人： Yoshihiro Okada ,  Yuichi Saito ,  Shinya Yamakawa ,  Atsushi Ban ,  Masaya Okamoto ,  Hiroyuki Ohgami

IPC分类号： H01L2904

CPC分类号： H01L29/78603 ,  G02F1/1362 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66765

摘要： An active matrix substrate includes base substrate, gate lines, data lines, thin-film transistors and pixel electrodes. The gate lines are formed on the base substrate. The data lines are formed over the gate lines. Each of the data lines crosses all of the gate lines with an insulating film interposed therebetween. The thin-film transistors are formed over the base substrate. Each of the thin-film transistors is associated with one of the gate lines and operates responsive to a signal on the associated gate line. Each of the pixel electrodes is associated with one of the data lines and one of the thin-film transistors and is electrically connectable to the associated data line by way of the associated thin-film transistor. Each of the pixel electrodes and the associated thin-film transistor are connected together by way of a conductive member. Each of the pixel electrodes crosses one of the gate lines, while the conductive member for the pixel electrode crosses another one of the gate lines that is adjacent to the former gate line.

摘要翻译： 有源矩阵基板包括基底，栅线，数据线，薄膜晶体管和像素电极。 栅极线形成在基底基板上。 数据线形成在栅极线上。 每条数据线都插入绝缘膜，与所有栅极线交叉。 薄膜晶体管形成在基底基板上。 每个薄膜晶体管与一条栅极线路相关联，并且响应于相关联的栅极线上的信号而工作。 每个像素电极与数据线之一和薄膜晶体管中的一个相关联，并且可通过相关联的薄膜晶体管电连接到相关联的数据线。 每个像素电极和相关联的薄膜晶体管通过导电构件连接在一起。 每个像素电极与一条栅极线交叉，而用于像素电极的导电构件与另一条与前一栅极线相邻的栅极线交叉。

公开(公告)号：US20110003417A1

公开(公告)日：2011-01-06

申请号：US12807215

申请日：2010-08-31

申请人： Yoshihiro Okada ,  Yuichi Saito ,  Shinya Yamakawa ,  Atsushi Ban ,  Masaya Okamoto ,  Hiroyuki Ohgami

发明人： Yoshihiro Okada ,  Yuichi Saito ,  Shinya Yamakawa ,  Atsushi Ban ,  Masaya Okamoto ,  Hiroyuki Ohgami

IPC分类号： H01L21/336 ,  H01L33/02

CPC分类号： H01L29/78603 ,  G02F1/1362 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66765

摘要： An active matrix substrate includes base substrate, gate lines, data lines, thin-film transistors and pixel electrodes. The gate lines are formed on the base substrate. The data lines are formed over the gate lines. Each of the data lines crosses all of the gate lines with an insulating film interposed therebetween. The thin-film transistors are formed over the base substrate. Each of the thin-film transistors is associated with one of the gate lines and operates responsive to a signal on the associated gate line. Each of the pixel electrodes is associated with one of the data lines and one of the thin-film transistors and is electrically connectable to the associated data line by way of the associated thin-film transistor. Each of the pixel electrodes and the associated thin-film transistor are connected together by way of a conductive member. Each of the pixel electrodes crosses one of the gate lines, while the conductive member for the pixel electrode crosses another one of the gate lines that is adjacent to the former gate line.

摘要翻译： 有源矩阵基板包括基底，栅线，数据线，薄膜晶体管和像素电极。 栅极线形成在基底基板上。 数据线形成在栅极线上。 每条数据线与绝缘膜相交，跨越所有栅极线。 薄膜晶体管形成在基底基板上。 每个薄膜晶体管与一条栅极线路相关联，并且响应于相关联的栅极线上的信号而工作。 每个像素电极与数据线之一和薄膜晶体管中的一个相关联，并且可通过相关联的薄膜晶体管电连接到相关联的数据线。 每个像素电极和相关联的薄膜晶体管通过导电构件连接在一起。 每个像素电极与一条栅极线交叉，而用于像素电极的导电构件与另一条与前一栅极线相邻的栅极线交叉。

公开(公告)号：US20100167443A1

公开(公告)日：2010-07-01

申请号：US12658555

申请日：2010-02-11

申请人： Yoshihiro Okada ,  Yuichi Saito ,  Shinya Yamakawa ,  Atsushi Ban ,  Masaya Okamoto ,  Hiroyuki Ohgami

发明人： Yoshihiro Okada ,  Yuichi Saito ,  Shinya Yamakawa ,  Atsushi Ban ,  Masaya Okamoto ,  Hiroyuki Ohgami

IPC分类号： H01L33/00

CPC分类号： H01L29/78603 ,  G02F1/1362 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66765

摘要： An active matrix substrate includes base substrate, gate lines, data lines, thin-film transistors and pixel electrodes. The gate lines are formed on the base substrate. The data lines are formed over the gate lines. Each of the data lines crosses all of the gate lines with an insulating film interposed therebetween. The thin-film transistors are formed over the base substrate. Each of the thin-film transistors is associated with one of the gate lines and operates responsive to a signal on the associated gate line. Each of the pixel electrodes is associated with one of the data lines and one of the thin-film transistors and is electrically connectable to the associated data line by way of the associated thin-film transistor. Each of the pixel electrodes and the associated thin-film transistor are connected together by way of a conductive member. Each of the pixel electrodes crosses one of the gate lines, while the conductive member for the pixel electrode crosses another one of the gate lines that is adjacent to the former gate line.

公开(公告)号：US07696516B2

公开(公告)日：2010-04-13

申请号：US12283893

申请日：2008-09-16

申请人： Yoshihiro Okada ,  Yuichi Saito ,  Shinya Yamakawa ,  Atsushi Ban ,  Masaya Okamoto ,  Hiroyuki Ohgami

发明人： Yoshihiro Okada ,  Yuichi Saito ,  Shinya Yamakawa ,  Atsushi Ban ,  Masaya Okamoto ,  Hiroyuki Ohgami

IPC分类号： H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20

CPC分类号： H01L29/78603 ,  G02F1/1362 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66765

摘要： An active matrix substrate includes base substrate, gate lines, data lines, thin-film transistors and pixel electrodes. The gate lines are formed on the base substrate. The data lines are formed over the gate lines. Each of the data lines crosses all of the gate lines with an insulating film interposed therebetween. The thin-film transistors are formed over the base substrate. Each of the thin-film transistors is associated with one of the gate lines and operates responsive to a signal on the associated gate line. Each of the pixel electrodes is associated with one of the data lines and one of the thin-film transistors and is electrically connectable to the associated data line by way of the associated thin-film transistor. Each of the pixel electrodes and the associated thin-film transistor are connected together by way of a conductive member. Each of the pixel electrodes crosses one of the gate lines, while the conductive member for the pixel electrode crosses another one of the gate lines that is adjacent to the former gate line.

公开(公告)号：US07459723B2

公开(公告)日：2008-12-02

申请号：US11450810

申请日：2006-06-08

申请人： Yoshihiro Okada ,  Yuichi Saito ,  Shinya Yamakawa ,  Atsushi Ban ,  Masaya Okamoto ,  Hiroyuki Ohgami

发明人： Yoshihiro Okada ,  Yuichi Saito ,  Shinya Yamakawa ,  Atsushi Ban ,  Masaya Okamoto ,  Hiroyuki Ohgami

IPC分类号： H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20

CPC分类号： H01L29/78603 ,  G02F1/1362 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66765

摘要： An active matrix substrate includes base substrate, gate lines, data lines, thin-film transistors and pixel electrodes. The gate lines are formed on the base substrate. The data lines are formed over the gate lines. Each of the data lines crosses all of the gate lines with an insulating film interposed therebetween. The thin-film transistors are formed over the base substrate. Each of the thin-film transistors is associated with one of the gate lines and operates responsive to a signal on the associated gate line. Each of the pixel electrodes is associated with one of the data lines and one of the thin-film transistors and is electrically connectable to the associated data line by way of the associated thin-film transistor. Each of the pixel electrodes and the associated thin-film transistor are connected together by way of a conductive member. Each of the pixel electrodes crosses one of the gate lines, while the conductive member for the pixel electrode crosses another one of the gate lines that is adjacent to the former gate line.

摘要翻译： 有源矩阵基板包括基底，栅线，数据线，薄膜晶体管和像素电极。 栅极线形成在基底基板上。 数据线形成在栅极线上。 每条数据线都插入绝缘膜，与所有栅极线交叉。 薄膜晶体管形成在基底基板上。 每个薄膜晶体管与一条栅极线路相关联，并且响应于相关联的栅极线上的信号而工作。 每个像素电极与数据线之一和薄膜晶体管中的一个相关联，并且可通过相关联的薄膜晶体管电连接到相关联的数据线。 每个像素电极和相关联的薄膜晶体管通过导电构件连接在一起。 每个像素电极与一条栅极线交叉，而用于像素电极的导电构件与另一条与前一栅极线相邻的栅极线交叉。