公开(公告)号：US09609610B2

公开(公告)日：2017-03-28

申请号：US14613264

申请日：2015-02-03

Applicant: Aviat U.S., Inc.

Inventor： Philip Secker ,  Peter Croy

IPC: H04L7/00 ,  H04W56/00 ,  H03L7/18 ,  H03L7/08 ,  H04J3/06

CPC classification number: H04W56/0015 ,  H03L7/08 ,  H03L7/18 ,  H03L2207/50 ,  H04J3/0602 ,  H04J3/0617 ,  H04J3/0638 ,  H04J3/0641 ,  H04J3/0647 ,  H04J3/065 ,  H04J3/0658 ,  H04J3/0679 ,  H04J3/0688

Abstract: In some embodiments, a system comprises a clock, a root node, a radio channel network, and first and second child nodes. The clock may be configured to generate a clock signal. The root node may be configured to generate a first frame including a first payload and a first overhead and generate a second frame including a second payload and a second overhead. The first and second overheads may comprise a synchronization value based on the clock signal. The radio channel network may be in communication with the root node for transmitting the first and second frames. Each first and second child nodes may be configured to perform clock recovery including frequency synchronization using the synchronization value and a respective phase-lock loop.

公开(公告)号：US20150156741A1

公开(公告)日：2015-06-04

申请号：US14613264

申请日：2015-02-03

Applicant: Aviat U.S., Inc.

Inventor： Philip Secker ,  Peter Croy

IPC: H04W56/00 ,  H03L7/08 ,  H04J3/06

CPC classification number: H04W56/0015 ,  H03L7/08 ,  H03L7/18 ,  H03L2207/50 ,  H04J3/0602 ,  H04J3/0617 ,  H04J3/0638 ,  H04J3/0641 ,  H04J3/0647 ,  H04J3/065 ,  H04J3/0658 ,  H04J3/0679 ,  H04J3/0688

Abstract: In some embodiments, a system comprises a clock, a root node, a radio channel network, and first and second child nodes. The clock may be configured to generate a clock signal. The root node may be configured to generate a first frame including a first payload and a first overhead and generate a second frame including a second payload and a second overhead. The first and second overheads may comprise a synchronization value based on the clock signal. The radio channel network may be in communication with the root node for transmitting the first and second frames. Each first and second child nodes may be configured to perform clock recovery including frequency synchronization using the synchronization value and a respective phase-lock loop.

Abstract translation: 在一些实施例中，系统包括时钟，根节点，无线电信道网络以及第一和第二子节点。 时钟可以被配置为产生时钟信号。 根节点可以被配置为生成包括第一有效载荷和第一开销的第一帧，并且生成包括第二有效载荷和第二开销的第二帧。 第一和第二开销可以包括基于时钟信号的同步值。 无线电信道网络可以与根节点进行通信，用于发送第一和第二帧。 每个第一和第二子节点可以被配置为执行包括使用同步值的频率同步的时钟恢复和相应的锁相环。

公开(公告)号：US08983015B2

公开(公告)日：2015-03-17

申请号：US14060503

申请日：2013-10-22

Applicant: Aviat U.S., Inc.

Inventor： Philip Secker ,  Peter Croy

IPC: H04L7/00 ,  H04J3/06 ,  H03L7/18

CPC classification number: H04W56/0015 ,  H03L7/08 ,  H03L7/18 ,  H03L2207/50 ,  H04J3/0602 ,  H04J3/0617 ,  H04J3/0638 ,  H04J3/0641 ,  H04J3/0647 ,  H04J3/065 ,  H04J3/0658 ,  H04J3/0679 ,  H04J3/0688

Abstract: In some embodiments, a system comprises a clock, a root node, a radio channel network, and first and second child nodes. The clock may be configured to generate a clock signal. The root node may be configured to generate a first frame including a first payload and a first overhead and generate a second frame including a second payload and a second overhead. The first and second overheads may comprise a synchronization value based on the clock signal. The radio channel network may be in communication with the root node for transmitting the first and second frames. Each first and second child nodes may be configured to perform clock recovery including frequency synchronization using the synchronization value and a respective phase-lock loop.

Abstract translation: 在一些实施例中，系统包括时钟，根节点，无线电信道网络以及第一和第二子节点。 时钟可以被配置为产生时钟信号。 根节点可以被配置为生成包括第一有效载荷和第一开销的第一帧，并且生成包括第二有效载荷和第二开销的第二帧。 第一和第二开销可以包括基于时钟信号的同步值。 无线电信道网络可以与根节点进行通信，用于发送第一和第二帧。 每个第一和第二子节点可以被配置为执行包括使用同步值的频率同步的时钟恢复和相应的锁相环。

公开(公告)号：US20140086375A1

公开(公告)日：2014-03-27

申请号：US14060503

申请日：2013-10-22

Applicant: Aviat U.S., Inc.

Inventor： Philip Secker ,  Peter Croy

IPC: H04J3/06

CPC classification number: H04W56/0015 ,  H03L7/08 ,  H03L7/18 ,  H03L2207/50 ,  H04J3/0602 ,  H04J3/0617 ,  H04J3/0638 ,  H04J3/0641 ,  H04J3/0647 ,  H04J3/065 ,  H04J3/0658 ,  H04J3/0679 ,  H04J3/0688

Abstract: In some embodiments, a system comprises a clock, a root node, a radio channel network, and first and second child nodes. The clock may be configured to generate a clock signal. The root node may be configured to generate a first frame including a first payload and a first overhead and generate a second frame including a second payload and a second overhead. The first and second overheads may comprise a synchronization value based on the clock signal. The radio channel network may be in communication with the root node for transmitting the first and second frames. Each first and second child nodes may be configured to perform clock recovery including frequency synchronization using the synchronization value and a respective phase-lock loop.

Abstract translation: 在一些实施例中，系统包括时钟，根节点，无线电信道网络以及第一和第二子节点。 时钟可以被配置为产生时钟信号。 根节点可以被配置为生成包括第一有效载荷和第一开销的第一帧，并且生成包括第二有效载荷和第二开销的第二帧。 第一和第二开销可以包括基于时钟信号的同步值。 无线电信道网络可以与根节点进行通信，用于发送第一和第二帧。 每个第一和第二子节点可以被配置为执行包括使用同步值的频率同步的时钟恢复和相应的锁相环。