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公开(公告)号:US20240275511A1
公开(公告)日:2024-08-15
申请号:US18490836
申请日:2023-10-20
发明人: Takahiro YAMAURA , Yasin OGE , Yuta KOBAYASHI
IPC分类号: H04J3/06
CPC分类号: H04J3/0641 , H04J3/0658
摘要: According to one embodiment, a control system includes first and second control devices. The first control device includes a management unit that manages global time, a first generation unit that generates local time, a control unit that controls an operation of the first control device based on the global time, the local time, and operation control information, and a second generation unit that generates time error information based on the global time and the local time. The second control device includes an acquisition unit that acquires the time error information, and a correction unit that corrects the operation control information based on the time error information.
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公开(公告)号:US20230171016A1
公开(公告)日:2023-06-01
申请号:US17993986
申请日:2022-11-24
发明人: Kuan-Tse Lee
IPC分类号: H04J3/06
CPC分类号: H04J3/0667 , H04J3/0641
摘要: A network switch can include a precision time protocol (PTP) module and a circuit board. The PTP module can provide a first clock signal and include a predetermined interface. The circuit board can include a socket, an oscillator and a selection unit. The socket can be inserted by the predetermined interface to receive the first clock signal. The oscillator can provide a second clock signal. The selection unit can include a first terminal, a second terminal, an output terminal and a selection terminal. The first terminal can receive the first clock signal when the predetermined interface is inserted into the socket. The second terminal can receive the second clock signal. The output terminal can output one of the first clock signal and the second clock signal. The selection terminal can receive a selection signal to control the output terminal to output the first clock signal or the second clock signal.
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公开(公告)号:US20190109763A1
公开(公告)日:2019-04-11
申请号:US16212880
申请日:2018-12-07
发明人: Donald Crabtree , John S. Houston
CPC分类号: H04L41/0816 , G06F1/14 , H04J3/0641 , H04J3/0679
摘要: A coordinated timing network is dynamically split into a plurality of coordinated timing networks. This split occurs without taking down any of the servers. Each coordinated timing network has its own coordinated timing network identifier (CTN ID), and its own primary time server. Optionally, each coordinated timing network includes a backup time server and an arbiter.
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公开(公告)号:US20190007151A1
公开(公告)日:2019-01-03
申请号:US16022517
申请日:2018-06-28
CPC分类号: H04J3/0667 , H04B7/0857 , H04J3/0641 , H04J3/0682 , H04W56/0015 , H04W56/0055 , H04W84/18
摘要: Methods, systems, and devices for wireless communication are described. A user equipment (UE) may obtain a timing synchronization signal from a base station over a cellular wireless communication link. The UE may configure, based at least in part on the timing synchronization signal, a timer function of the UE as a precision time protocol (PTP) server. The UE may configure a PTP announce message based on the timer function and, in some examples, one or more metrics of the cellular wireless communication link. The UE may transmit the PTP announce message over a local communication network.
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公开(公告)号:US20180262287A1
公开(公告)日:2018-09-13
申请号:US15760870
申请日:2016-09-05
发明人: Liuyan HAN , Han LI
IPC分类号: H04J3/06
CPC分类号: H04J3/0658 , H04J3/0641 , H04J3/0667 , H04J3/0673
摘要: Provided are a time synchronization packet processing method and device, which are applied to a time synchronization node. The processing method comprises: according to a change condition of received time source information, judging whether a time synchronization node tracking time source changes; and when the time synchronization node tracking time source changes, and after a predetermined time delay, sending to a downstream clock node a time synchronization packet parameter modified according to the change condition of the time source information. By distinguishing a change condition of time source information input by a time synchronization node, and when the change condition of the time source information changes a time synchronization node tracking time source, setting a certain delay time for changing and outputting a time synchronization packet parameter, the present invention avoids unnecessary downstream oscillation, and ensures the stable operation of a time synchronization network.
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公开(公告)号:US09973601B2
公开(公告)日:2018-05-15
申请号:US14198351
申请日:2014-03-05
发明人: Eric John Spada , Yongbum Kim
CPC分类号: H04L69/28 , H04J3/0641 , H04J3/0667
摘要: Fault tolerant and redundant grand master clock scheme may reduce or eliminate precision time transition caused by a network link or device failure. A primary synchronization message may be sent by a primary grandmaster clock and one or more backup synchronization message may be sent by respective backup grandmaster clocks. The primary and backup grandmaster clocks may be concurrently operated. The primary and backup synchronization messages may be sent to an end station over a network. The end station may derive a local clock based on one, some, or all of the received messages. The end station may or may not distinguish between the messages based on the clock source. The end station may validate messages received from a particular clock source.
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公开(公告)号:US09934113B2
公开(公告)日:2018-04-03
申请号:US14875008
申请日:2015-10-05
CPC分类号: G06F11/2033 , G06F11/2028 , G06F11/2038 , G06F11/2048 , G06F2201/805 , H04J3/0641 , H04L69/28
摘要: An enhanced console assisted recovery capability provides an efficient technique for communicating the failure of a primary time server to the backup time server in order to provide fast failure recovery of a synchronized timing network with the intent of avoiding a complete network outage. The primary time server efficiently notifies the backup time server that the primary time server is about to become unavailable. The backup time server can then begin an immediate takeover of time serving to the synchronized network.
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公开(公告)号:US20180059712A1
公开(公告)日:2018-03-01
申请号:US15670715
申请日:2017-08-07
申请人: FUJITSU LIMITED
CPC分类号: G06F1/12 , G01S19/01 , G06F11/0751 , H03K5/135 , H03K2005/00104 , H04J3/0641 , H04J3/0667 , H04L29/0854 , H04L69/28 , H04L2027/0026
摘要: A wireless communication apparatus includes a memory, and a processor coupled to the memory and configured to calculate a variation amount based on a frequency difference between a first clock signal in a first synchronous processing apparatus and a second clock signal in the wireless communication apparatus according to a first message exchanged between the first synchronous processing apparatus and the wireless communication apparatus, calculate a correction amount based on a phase difference between a first time in a second synchronous processing apparatus and a second time in the wireless communication apparatus according to a second message exchanged between the second synchronous processing apparatus and the wireless communication apparatus, and when a failure is detected in the first synchronous processing apparatus based on the variation amount and the correction amount, switch an object for synchronization from the first synchronous processing apparatus to the second synchronous processing apparatus.
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公开(公告)号:US09887794B2
公开(公告)日:2018-02-06
申请号:US15431043
申请日:2017-02-13
发明人: Claude Robitaille , Steve Rochon , Yanick Viens
IPC分类号: H04J3/06
CPC分类号: H04J3/0658 , H04J3/0641 , H04L12/40 , H04L12/403
摘要: A method of simplifying the implementation of Synchronous Ethernet on an Ethernet device having a first port and a second port device using a predetermined protocol and signaling, comprises delivering a master clock from a Synchronous Ethernet system to the first port of the Ethernet device; transmitting the delivered master clock to the second port of the Ethernet device independently of the protocol and signaling of the Ethernet device; and transmitting the master clock from the second port of the Ethernet device to a downstream device that supports Synchronous Ethernet. In one implementation, the Ethernet device has a local clock, and the method synchronizes the local clock to the master clock. In another implementation, the Ethernet device does not have a local clock, and the master clock is transmitted from the second port of the Ethernet device to the downstream device without any synchronizing operation at the Ethernet device.
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10.
公开(公告)号:US20180032774A1
公开(公告)日:2018-02-01
申请号:US15728426
申请日:2017-10-09
申请人: NEOLOGY, INC.
发明人: James Robert KRUEST , Gary BANN
IPC分类号: G06K7/10
CPC分类号: G06K7/10475 , G06K7/0008 , G06K7/10029 , G06K7/10039 , G06K19/0723 , G06K19/07796 , G06K19/07798 , G06Q10/08 , H04J3/0641 , H05K1/02 , H05K1/0266 , H05K1/0268 , H05K1/142 , H05K3/30 , H05K2201/0909 , H05K2201/09127
摘要: RFID tags are used for many purpose including tracking. RFID interrogators are used to retrieve information from tags. In many applications, a plurality of RFID interrogators are required. Synchronization between interrogators in the same theatre of operation is critical to ensure that their broadcasts do not interfere with each other. In fixed RFID interrogator applications, RFID interrogators can be wired together allowing a channel to synchronize the transmissions of the RFID interrogators. Methods described herein can ensure that synchronization is maintained in the event of the failure of a synchronizing master. Furthermore, additional methods for synchronizing RFID interrogators in wireless applications are described allowing synchronization in the absence of wired connections between interrogators.
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