公开(公告)号：US08859315B2

公开(公告)日：2014-10-14

申请号：US13663000

申请日：2012-10-29

Applicant: BYD Company Limited

Inventor： Xilin Su ,  Hongpo Hu ,  Chunlin Xie ,  Wang Zhang ,  Qiang Wang

IPC: H01L21/20 ,  H01L33/38 ,  H01L33/00

CPC classification number: H01L33/382 ,  H01L33/007 ,  H01L2933/0016

Abstract: A semiconductor device comprises a substrate; a conductive layer deposited on a substrate, the conductive layer being patterned to include a first pattern, the first pattern including a major surface and a plurality of grids defined in the major surface, the major surface including first lines and a connecting portion, wherein the connecting portion is connected to an electrode; and an epitaxial layer disposed on the conductive layer, covering the grids and the first line between the adjacent grids.

Abstract translation: 半导体器件包括衬底; 沉积在衬底上的导电层，所述导电层被图案化以包括第一图案，所述第一图案包括主表面和限定在所述主表面中的多个栅格，所述主表面包括第一线和连接部分，其中， 连接部分连接到电极; 以及设置在导电层上的外延层，覆盖相邻网格之间的网格和第一线。

公开(公告)号：US09401457B2

公开(公告)日：2016-07-26

申请号：US14101210

申请日：2013-12-09

Applicant: BYD Company Limited

Inventor： Wanshi Chen ,  Wang Zhang

IPC: H01L21/76 ,  H01L21/00 ,  H01L21/44 ,  H01L21/4763 ,  H01L33/42 ,  C23C14/30 ,  C23C14/08 ,  H01L31/0224 ,  H01L21/02 ,  H01L33/22

CPC classification number: H01L33/42 ,  C23C14/086 ,  C23C14/30 ,  H01L21/02104 ,  H01L31/022466 ,  H01L31/022475 ,  H01L31/022483 ,  H01L33/22 ,  H01L2251/308 ,  H01L2933/0016

Abstract: A method of forming a current diffusion layer is provided that comprises providing an epitaxial wafer. The method further comprises depositing ITO source material on the epitaxial wafer to form a base ITO layer by a direct current electron gun and depositing ZnO source material, during simultaneous deposition of the ITO source material, on the base ITO layer to form a ZnO doped ITO layer by a pulse current electron gun. The ZnO source material is deposited at a deposition rate higher than the rate at which the ITO source material is deposited. Generation and termination of current may be controlled by adjusting a duty cycle of pulse current provided by the pulse current electron gun and result in discontinuous deposition of the ZnO source material. The method further comprises depositing the ITO source material on the ZnO doped ITO layer to cover the ZnO doped ITO layer and form a finished ITO layer.

Abstract translation: 提供形成电流扩散层的方法，其包括提供外延晶片。 该方法还包括在外延晶片上沉积ITO源材料，通过直流电子枪形成基底ITO层，并且在ITO源材料同时沉积期间沉积ZnO源材料，形成ZnO掺杂的ITO 层由脉冲电流电子枪。 ZnO源材料以高于ITO源材料沉积速率的沉积速率沉积。 可以通过调节由脉冲电流电子枪提供的脉冲电流的占空比来控制电流的产生和终止，并导致ZnO源材料的不连续沉积。 该方法还包括将ITO源材料沉积在ZnO掺杂的ITO层上以覆盖ZnO掺杂的ITO层并形成成品的ITO层。

公开(公告)号：US20140091355A1

公开(公告)日：2014-04-03

申请号：US14101210

申请日：2013-12-09

Applicant: BYD Company Limited

Inventor： Wanshi Chen ,  Wang Zhang

IPC: H01L33/42

CPC classification number: H01L33/42 ,  C23C14/086 ,  C23C14/30 ,  H01L21/02104 ,  H01L31/022466 ,  H01L31/022475 ,  H01L31/022483 ,  H01L33/22 ,  H01L2251/308 ,  H01L2933/0016

Abstract: A method of forming a current diffusion layer is provided that comprises providing an epitaxial wafer. The method further comprises depositing ITO source material on the epitaxial wafer to form a base ITO layer by a direct current electron gun and depositing ZnO source material, during simultaneous deposition of the ITO source material, on the base ITO layer to form a ZnO doped ITO layer by a pulse current electron gun. The ZnO source material is deposited at a deposition rate higher than the rate at which the ITO source material is deposited. Generation and termination of current may be controlled by adjusting a duty cycle of pulse current provided by the pulse current electron gun and result in discontinuous deposition of the ZnO source material. The method further comprises depositing the ITO source material on the ZnO doped ITO layer to cover the ZnO doped ITO layer and form a finished ITO layer.

Abstract translation: 提供形成电流扩散层的方法，其包括提供外延晶片。 该方法还包括在外延晶片上沉积ITO源材料，通过直流电子枪形成基底ITO层，并且在ITO源材料同时沉积期间沉积ZnO源材料，形成ZnO掺杂的ITO 层由脉冲电流电子枪。 ZnO源材料以高于ITO源材料沉积速率的沉积速率沉积。 可以通过调节由脉冲电流电子枪提供的脉冲电流的占空比来控制电流的产生和终止，并导致ZnO源材料的不连续沉积。 该方法还包括将ITO源材料沉积在ZnO掺杂的ITO层上以覆盖ZnO掺杂的ITO层并形成成品的ITO层。

公开(公告)号：US20130052807A1

公开(公告)日：2013-02-28

申请号：US13663000

申请日：2012-10-29

Applicant: BYD Company Limited

Inventor： Xilin Su ,  Hongpo Hu ,  Chunlin Xie ,  Wang Zhang ,  Qiang Wang

IPC: H01L21/20

CPC classification number: H01L33/382 ,  H01L33/007 ,  H01L2933/0016

Abstract: A semiconductor device comprises a substrate; a conductive layer deposited on a substrate, the conductive layer being patterned to include a first pattern, the first pattern including a major surface and a plurality of grids defined in the major surface, the major surface including first lines and a connecting portion, wherein the connecting portion is connected to an electrode; and an epitaxial layer disposed on the conductive layer, covering the grids and the first line between the adjacent grids.

Abstract translation: 半导体器件包括衬底; 沉积在衬底上的导电层，所述导电层被图案化以包括第一图案，所述第一图案包括主表面和限定在所述主表面中的多个栅格，所述主表面包括第一线和连接部分，其中， 连接部分连接到电极; 以及设置在导电层上的外延层，覆盖相邻网格之间的网格和第一线。