Abstract:
Aspects of dynamic power profiling are described herein. In various embodiments, a current sense operating mode is set for a current sense circuit, and the current sense circuit is enabled for operation. The current sense circuit senses an amount of current supplied by at least one of a plurality of power rails based on the current sense operating mode. The current sense circuit also accumulates and stores a value of the amount of current over a period of time. In certain aspects, a system controller averages the value of the amount of current based on the period of time. The current sense circuit may be configured to operate in various modes of operation including single or scan rail modes of operation, and the average of the value of the amount of current may be evaluated based on the modes of operation of the current sense circuit and/or the system.
Abstract:
Aspects of power and system management information visibility are described. In various embodiments, a system parameter of a system is measured. The system parameter may include one or more parameters such as system voltages, temperatures, options, or conditions of the system. The system parameter may be evaluated by a power manager processor. The evaluation may determine operating settings for one or more elements of the system. Based on the evaluation, one or more operating parameters for elements of the system may be set, in advance of powering up the system elements. After the operating parameters have been set, system elements may be released to start or boot based on the operating parameters. In this manner, one or more elements of the system may power on in a more flexible and deliberate manner, taking the current operating environment of the system into consideration.
Abstract:
Aspects of power mode register reduction and power rail bring up enhancements are described. In one embodiment, an operating parameter for a first power rail is set by power management circuit according to a predetermined programmed setting. In connection with a wait time, the power rail is enabled, and a processor is released to start. In turn, at least one of a command to modify the operating parameter for the first power rail or a command to set an operating parameter for a second power rail is received from the processor over a high speed interface. By accessing a grouped operating register for a group of power rails, the processor can update or modify settings of an entire group of power rails at one time. In connection with the processor, the power management circuit can power up a plurality of power rails in a flexible and efficient manner.
Abstract:
Aspects of dynamic power mode switching per rail based on power profiling are described. In one embodiment, an amount of current supplied by at least one of a plurality of power rails is sensed with a current sense circuit. The amount of current is profiled over a period of time and a profile of power consumed is generated and maintained. With reference to the power profile, one or more power-related decisions may be made in a system. One or more power rails may be powered off or placed into low power mode based on various factors, such as the amount of current being consumed per rail, the temperature of certain system components, or an unexpected ongoing consumption of power in the system.
Abstract:
Aspects of enhanced recovery mechanisms are described. A predetermined operating parameter for a power rail is set at the outset of system start. Afterwards, a processor is released to start with a power management circuit. In turn, the power management circuit receives a default operating parameter for the power rail from the processor, and stores the default operating parameter. The power management circuit also receives a runtime operating parameter for the power rail from the processor and modifies the operating parameter for the power rail according to the runtime operating parameter. If an error condition in the processor is encountered, the power management circuit may modify the operating parameter for the power rail according to the default operating parameter in response to a reset control signal from the processor. Use of the default operating parameter for the power rail may assist the processor to recover from the error condition.
Abstract:
A method for serial interface clock domain crossing includes identifying a data communication command received over a serial interface. An address is decoded to determine whether the address falls within a direct latch address range of a register bank. Data is communicated over the serial interface. A multiplexed output clock is generated, for writing to and reading from the register bank, based on at least one of a current system operating state and a refresh control signal from a host processor.
Abstract:
Aspects of enhanced recovery mechanisms are described. A predetermined operating parameter for a power rail is set at the outset of system start. Afterwards, a processor is released to start with a power management circuit. In turn, the power management circuit receives a default operating parameter for the power rail from the processor, and stores the default operating parameter. The power management circuit also receives a runtime operating parameter for the power rail from the processor and modifies the operating parameter for the power rail according to the runtime operating parameter. If an error condition in the processor is encountered, the power management circuit may modify the operating parameter for the power rail according to the default operating parameter in response to a reset control signal from the processor. Use of the default operating parameter for the power rail may assist the processor to recover from the error condition.
Abstract:
A voltage dedicated charger apparatus includes an AC-to-DC converter circuit, a pair of switches, and a controller block. The AC-to-DC converter circuit converts an AC input voltage to a DC output voltage. The pair of switches is operable to isolate a pair of data ports from the AC-to-DC converter circuit. The pair of data ports includes a DP port and a DN port. The controller block includes a monitor circuit, a transceiver, and a control circuit. The monitor circuit monitors the DP and DN ports of the apparatus. The transceiver receives one or more messages form a charge-receiving device and communicate data to the charge-receiving device. The control circuit controls operation of the pair of switches based on a signal from the monitor circuit.
Abstract:
Aspects of charger detection and optimization prior to host control are described herein. In various embodiments, a condition of whether reverse current is present on a system bus is detected. When the condition for reverse current is present, reverse current is sunk by one or more of various reverse current sink circuits. By relying upon one or more of the reverse current sink circuits, for safety, to address or mitigate the condition for reverse current, a detector may be able to identify or distinguish among several different types of charger or charging ports coupled to a system bus allowing a charger to be selected optimally. Further, an indicator of the type of charger or charging port coupled to the system bus is communicated over a single pin interface, for backwards compatibility with circuits capable of identifying between only two different types of chargers.
Abstract:
A voltage dedicated charger apparatus includes an AC-to-DC converter circuit, a pair of switches, and a controller block. The AC-to-DC converter circuit converts an AC input voltage to a DC output voltage. The pair of switches is operable to isolate a pair of data ports from the AC-to-DC converter circuit. The pair of data ports includes a DP port and a DN port. The controller block includes a monitor circuit, a transceiver, and a control circuit. The monitor circuit monitors the DP and DN ports of the apparatus. The transceiver receives one or more messages form a charge-receiving device and communicate data to the charge-receiving device. The control circuit controls operation of the pair of switches based on a signal from the monitor circuit.