公开(公告)号：US12093619B2

公开(公告)日：2024-09-17

申请号：US18314029

申请日：2023-05-08

申请人： Celera, Inc.

发明人： Calum MacRae ,  John Mason ,  Karen Mason

IPC分类号： G06F30/327 ,  G06F30/31 ,  G06F30/347 ,  G06F30/367 ,  G06F30/373 ,  G06F30/38 ,  G06F30/392 ,  G06F30/398 ,  G06F111/12

CPC分类号： G06F30/327 ,  G06F30/31 ,  G06F30/347 ,  G06F30/367 ,  G06F30/38 ,  G06F30/392 ,  G06F30/398 ,  G06F30/373 ,  G06F2111/12

摘要： In some embodiments, information specifying a transistor to be generated is received, the information comprising an on resistance. A total width of a gate of the transistor to be generated is determined based at least on the on resistance. A first width, a number of fingers (F), and a number of device cells (P) are determined based on the total width. A transistor level schematic is generated comprising one or more transistors configured with the first width and the number of fingers (F). A layout is generated, wherein the layout comprises P device cells, each device cell comprising a plurality of gates corresponding to said number of fingers (F) each gate having said first width, wherein the device cells are configured in a two-dimensional array.

公开(公告)号：US20230274059A1

公开(公告)日：2023-08-31

申请号：US18314029

申请日：2023-05-08

申请人： Celera, Inc.

发明人： Calum MacRae ,  John Mason ,  Karen Mason

IPC分类号： G06F30/327 ,  G06F30/392 ,  G06F30/398 ,  G06F30/367 ,  G06F30/38 ,  G06F30/31

CPC分类号： G06F30/327 ,  G06F30/392 ,  G06F30/398 ,  G06F30/367 ,  G06F30/38 ,  G06F30/31 ,  G06F2111/12

摘要： Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

公开(公告)号：US11354471B2

公开(公告)日：2022-06-07

申请号：US16886432

申请日：2020-05-28

申请人： Celera, Inc.

发明人： Calum MacRae ,  Karen Mason ,  John Mason ,  Richard Philpott

IPC分类号： G06F30/327 ,  G06F30/392 ,  G06F30/398 ,  G06F30/367 ,  G06F30/38 ,  G06F30/31 ,  G06F111/12

摘要： Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

公开(公告)号：US20230274058A1

公开(公告)日：2023-08-31

申请号：US18314012

申请日：2023-05-08

申请人： Celera, Inc.

发明人： Calum MacRae ,  John Mason ,  Karen Mason

IPC分类号： G06F30/327 ,  G06F30/392 ,  G06F30/398 ,  G06F30/367 ,  G06F30/38 ,  G06F30/31

CPC分类号： G06F30/327 ,  G06F30/392 ,  G06F30/398 ,  G06F30/367 ,  G06F30/38 ,  G06F30/31 ,  G06F2111/12

摘要： Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

公开(公告)号：US11361134B2

公开(公告)日：2022-06-14

申请号：US16886544

申请日：2020-05-28

申请人： Celera, Inc.

发明人： Karen Mason ,  John Mason

IPC分类号： G06F30/327 ,  G06F30/367 ,  G06F30/38 ,  G06F30/31 ,  G06F30/398 ,  G06F30/392 ,  G06F111/12

摘要： Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

公开(公告)号：US12093618B2

公开(公告)日：2024-09-17

申请号：US18314007

申请日：2023-05-08

申请人： Celera, Inc.

发明人： Calum MacRae ,  John Mason ,  Karen Mason

IPC分类号： G06F30/327 ,  G06F30/31 ,  G06F30/347 ,  G06F30/367 ,  G06F30/373 ,  G06F30/38 ,  G06F30/392 ,  G06F30/398 ,  G06F111/12

CPC分类号： G06F30/327 ,  G06F30/31 ,  G06F30/347 ,  G06F30/367 ,  G06F30/38 ,  G06F30/392 ,  G06F30/398 ,  G06F30/373 ,  G06F2111/12

摘要： In some embodiments, a computer-implemented method of generating a resistor comprises receiving a first resistor value, converting the resistor value into a plurality of resistor layout segments, and automatically placing the plurality of resistor layout segments based on one or more layout placement instructions to form the first resistor value.

公开(公告)号：US12079555B2

公开(公告)日：2024-09-03

申请号：US18314004

申请日：2023-05-08

申请人： Celera, Inc.

发明人： Calum MacRae ,  Jim LoCascio ,  Karen Mason ,  John Mason ,  Richard Philpott ,  Muhammed Abid Hussain

IPC分类号： G06F30/327 ,  G06F30/31 ,  G06F30/347 ,  G06F30/367 ,  G06F30/373 ,  G06F30/38 ,  G06F30/392 ,  G06F30/398 ,  G06F111/12

CPC分类号： G06F30/327 ,  G06F30/31 ,  G06F30/347 ,  G06F30/367 ,  G06F30/38 ,  G06F30/392 ,  G06F30/398 ,  G06F30/373 ,  G06F2111/12

摘要： Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

公开(公告)号：US12008296B2

公开(公告)日：2024-06-11

申请号：US18314000

申请日：2023-05-08

申请人： Celera, Inc.

发明人： Calum MacRae ,  John Mason ,  Karen Mason

IPC分类号： G06F30/327 ,  G06F30/31 ,  G06F30/347 ,  G06F30/367 ,  G06F30/373 ,  G06F30/38 ,  G06F30/392 ,  G06F30/398 ,  G06F111/12

CPC分类号： G06F30/327 ,  G06F30/31 ,  G06F30/347 ,  G06F30/367 ,  G06F30/38 ,  G06F30/392 ,  G06F30/398 ,  G06F30/373 ,  G06F2111/12

摘要： Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

公开(公告)号：US20200380192A1

公开(公告)日：2020-12-03

申请号：US16886577

申请日：2020-05-28

申请人： Celera, Inc.

发明人： Calum MacRae ,  Jim LoCascio ,  Karen Mason ,  John Mason ,  Richard Philpott ,  Muhammed Abid Hussain

IPC分类号： G06F30/392 ,  G06F30/398

摘要： Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

公开(公告)号：US12073157B2

公开(公告)日：2024-08-27

申请号：US18314000

申请日：2023-05-08

申请人： Celera, Inc.

发明人： Calum MacRae ,  John Mason ,  Karen Mason

IPC分类号： G06F30/327 ,  G06F30/31 ,  G06F30/347 ,  G06F30/367 ,  G06F30/373 ,  G06F30/38 ,  G06F30/392 ,  G06F30/398 ,  G06F111/12

CPC分类号： G06F30/327 ,  G06F30/31 ,  G06F30/347 ,  G06F30/367 ,  G06F30/38 ,  G06F30/392 ,  G06F30/398 ,  G06F30/373 ,  G06F2111/12

摘要： Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.