AUTOMATED VERIFICATION OF INTEGRATED CIRCUITS

    公开(公告)号:US20230267257A1

    公开(公告)日:2023-08-24

    申请号:US18177065

    申请日:2023-03-01

    Applicant: Celera, Inc.

    CPC classification number: G06F30/367

    Abstract: Embodiments of the present disclosure pertain to techniques for generating and/or verification of integrated circuits. In one embodiment, parameter values of functional circuit components to be generated are used to select behavioral models having model parameters corresponding to the functional circuit component being generated. In some embodiments, data obtained from physical circuits comprising functional circuit components is used in predefined behavioral models of the functional circuit components.

    Automated circuit generation
    2.
    发明授权

    公开(公告)号:US11354472B2

    公开(公告)日:2022-06-07

    申请号:US16886577

    申请日:2020-05-28

    Applicant: Celera, Inc.

    Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

    AUTOMATED CIRCUIT GENERATION
    3.
    发明申请

    公开(公告)号:US20200380188A1

    公开(公告)日:2020-12-03

    申请号:US16886432

    申请日:2020-05-28

    Applicant: Celera, Inc.

    Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

    AUTOMATED CIRCUIT GENERATION
    5.
    发明申请

    公开(公告)号:US20200380192A1

    公开(公告)日:2020-12-03

    申请号:US16886577

    申请日:2020-05-28

    Applicant: Celera, Inc.

    Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

    AUTOMATED CIRCUIT GENERATION
    6.
    发明申请

    公开(公告)号:US20250013812A1

    公开(公告)日:2025-01-09

    申请号:US18813957

    申请日:2024-08-23

    Applicant: Celera, Inc.

    Abstract: Automated circuit transistor level circuit schematic generation is disclosed. In some embodiments, parameters are received, and a transistor level circuit schematic is generated automatically by software based at least in part by the parameters. In some embodiments, software may receive parameters for functional circuit components and generate a transistor level circuit schematic for an integrated circuit comprising the functional circuit components having properties set by the parameters. The functional circuit components comprise analog circuits, which may be combined to form a circuit schematic comprising analog circuits. The present techniques are particularly useful for automatically generating analog and/or mixed signal integrated circuits.

    AUTOMATED CIRCUIT GENERATION
    7.
    发明申请

    公开(公告)号:US20240403524A1

    公开(公告)日:2024-12-05

    申请号:US18779321

    申请日:2024-07-22

    Applicant: Celera, Inc.

    Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

    AUTOMATED CIRCUIT GENERATION
    9.
    发明申请

    公开(公告)号:US20200380191A1

    公开(公告)日:2020-12-03

    申请号:US16886544

    申请日:2020-05-28

    Applicant: Celera, Inc.

    Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

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