公开(公告)号：US20240322909A1

公开(公告)日：2024-09-26

申请号：US18189114

申请日：2023-03-23

Applicant: Cisco Technology, Inc.

Inventor： Jock T. BOVINGTON ,  Mark C. NOWELL ,  Thomas J. WILLIAMS ,  Matthew J. TRAVERSO ,  Gary NICHOLL

IPC: H04B10/50 ,  H04B10/112

CPC classification number: H04B10/503 ,  H04B10/1127

Abstract: The systems and devices described provide for a user selectable CPO interface for both duplex and parallel optical network interfaces. The systems include a pluggable optical device with a laser source subassembly, an internal optical connector, a plurality of laser source optical paths connecting the laser source subassembly to the internal optical connector, and an external optical connector. The system also includes a plurality of transmit optical paths connecting the internal optical connector and the external optical connector and a plurality of receive paths connecting the internal optical connector and the external optical connector. The systems also include photonic device with a a set of laser source input channels connected to the pluggable optical device via a shared fiber array unit (FAU), a set of optical input channels receiving input optical signals from the pluggable optical device via the shared FAU, and a set of optical output channels transmitting optical signals from the photonic device to the pluggable optical device via the shared FAU.

公开(公告)号：US20210302715A1

公开(公告)日：2021-09-30

申请号：US16836768

申请日：2020-03-31

Applicant: Cisco Technology, Inc.

Inventor： Ashley J.M. ERICKSON ,  Matthew J. TRAVERSO

IPC: G02B23/08 ,  G02B6/30 ,  G02B6/35

Abstract: Periscope assemblies are provided which have a light path that travels in a first plane along the first waveguide, a second plane along the second waveguide that is parallel to the first plane, and along a third plane along the third waveguide that intersects the first plane and the second plane. In some examples the periscope assembly includes first and second carriers comprising respective first and second waveguides and defining respective first and second cavities in which a third carrier comprising a third waveguide is disposed and optionally includes an optical component. In some examples, the cavities are defined in one or more carriers on a mating surface, on a side opposite to the mating surface, or on a side perpendicular to a mating surface.

公开(公告)号：US20200280171A1

公开(公告)日：2020-09-03

申请号：US16290698

申请日：2019-03-01

Applicant: Cisco Technology, Inc.

Inventor： Dominic F. SIRIANI ,  Vipulkumar K. PATEL ,  Matthew J. TRAVERSO ,  Mark A. WEBSTER

IPC: H01S5/10 ,  H01S5/34 ,  H01S5/22 ,  H01S5/50

Abstract: An optical apparatus comprises a semiconductor substrate and an optical waveguide emitter. The optical waveguide emitter comprises an input waveguide section extending from a facet of the semiconductor substrate, a turning waveguide section optically coupled with the input waveguide section, and an output waveguide section extending to the same facet and optically coupled with the turning waveguide section. One or more of the input waveguide section, the turning waveguide section, and the output waveguide section comprises an optically active region.

公开(公告)号：US20240297717A1

公开(公告)日：2024-09-05

申请号：US18177992

申请日：2023-03-03

Applicant: Cisco Technology, Inc.

Inventor： Jock T. BOVINGTON ,  Matthew J. TRAVERSO

IPC: H04B10/50

CPC classification number: H04B10/501

Abstract: A pluggable device and method are presented. The pluggable device includes a substrate, a first pin positioned on the substrate, an optical source positioned on the substrate, and an integrated circuit positioned on the substrate. The optical source produces a source optical signal and transmits the source optical signal through the first pin. The integrated circuit transmits a received optical data signal and transmits a data signal based on a portion of the optical data signal.

公开(公告)号：US20210280568A1

公开(公告)日：2021-09-09

申请号：US17302853

申请日：2021-05-13

Applicant: Cisco Technology, Inc.

Inventor： Matthew J. TRAVERSO ,  Sandeep RAZDAN ,  Ashley J. MAKER

IPC: H01L25/16 ,  H01L31/02 ,  H01L23/498 ,  H01L21/48

Abstract: An optoelectronic assembly and methods of fabrication thereof are provided. The assembly includes a mold compound; a photonic integrated circuit (PIC) embedded in the mold compound, that has a face exposed from the mold compound in a first plane; an interposer embedded in the mold compound, that has a face exposed from the mold compound in the first plane (i.e., co-planar with the exposed face of the PIC); and an electrical integrated circuit (EIC) coupled to the exposed face of the PIC and the exposed face of the interposer, that establishes bridging electrical connections between the PIC and the interposer.

公开(公告)号：US20210231875A1

公开(公告)日：2021-07-29

申请号：US16751994

申请日：2020-01-24

Applicant: Cisco Technology, Inc.

Inventor： Dominic F. SIRIANI ,  Vipulkumar K. PATEL ,  Matthew J. TRAVERSO ,  Mark A. WEBSTER

IPC: G02B6/293

Abstract: Aspects described herein include an optical waveguide emitter that includes a first optical waveguide and a second optical waveguide that are evanescently coupled and collectively configured to selectively propagate only a first mode of a plurality of optical modes. Each of the first optical waveguide and the second optical waveguide extend through an input waveguide section, a turning waveguide section, and an output waveguide section. One or more of the input waveguide section, the turning waveguide section, and the output waveguide section includes an optically active region. The optical waveguide emitter further includes a refractive index-increasing feature in the turning waveguide section.

公开(公告)号：US20210072461A1

公开(公告)日：2021-03-11

申请号：US17103735

申请日：2020-11-24

Applicant: Cisco Technology, Inc.

Inventor： Matthew J. TRAVERSO ,  Ashley J. MAKER ,  Sandeep RAZDAN

IPC: G02B6/26 ,  G02B23/08

Abstract: The present disclosure provides for periscope optical assemblies within interposers that include a bulk material having a first side and a second side opposite to the first side; a first optic defined in the bulk material at a first height in the bulk material along an axis extending between the first second sides; a second optic defined in the bulk material at a second height in the bulk material, different than the first height, along the axis; a first waveguide defined in the bulk material, extending from the first side to the first optic; a second waveguide defined in the bulk material, extending from the second optic to the second side; and a third waveguide defined in the bulk material, extending from the first optic to the second optic.

公开(公告)号：US20190326266A1

公开(公告)日：2019-10-24

申请号：US15961163

申请日：2018-04-24

Applicant: Cisco Technology, Inc.

Inventor： Matthew J. TRAVERSO ,  Sandeep RAZDAN ,  Ashley J. MAKER

IPC: H01L25/16 ,  H01L31/02 ,  H01L23/498 ,  H01L21/48

Abstract: An optoelectronic assembly and methods of fabrication thereof are provided. The assembly includes a mold compound; a photonic integrated circuit (PIC) embedded in the mold compound, that has a face exposed from the mold compound in a first plane; an interposer embedded in the mold compound, that has a face exposed from the mold compound in the first plane (i.e., co-planar with the exposed face of the PIC); and an electrical integrated circuit (EIC) coupled to the exposed face of the PIC and the exposed face of the interposer, that establishes bridging electrical connections between the PIC and the interposer.

公开(公告)号：US20180313718A1

公开(公告)日：2018-11-01

申请号：US15582306

申请日：2017-04-28

Applicant: Cisco Technology, Inc.

Inventor： Matthew J. TRAVERSO ,  Ravi S. TUMMIDI ,  Mark A. WEBSTER ,  Sandeep RAZDAN

IPC: G01M11/00 ,  G02B6/12 ,  G02B6/13

CPC classification number: G01M11/30 ,  G02B6/12 ,  G02B6/122 ,  G02B6/13 ,  G02B2006/1213

Abstract: Embodiments herein describe techniques for testing optical components in a photonic chip using a testing structure disposed in a sacrificial region of a wafer. In one embodiment, the wafer is processed to form multiple photonic chips integrated into the wafer. While forming optical components in the photonic chips (e.g., modulators, detectors, waveguides, etc.), a testing structure can be formed in one or more sacrificial regions in the wafer. In one embodiment, the testing structure is arranged near an edge coupler in the photonic chip such that an optical signal can be transferred between the photonic chip and the testing structure. Moreover, the testing structure has a grating coupler disposed at or near a top surface of the wafer which permits optical signals to be transmitted into, or received from, the grating coupler when an optical probe is arranged above the grating coupler.

公开(公告)号：US20240272369A1

公开(公告)日：2024-08-15

申请号：US18168617

申请日：2023-02-14

Applicant: Cisco Technology, Inc.

Inventor： Matthew J. TRAVERSO ,  Donald J. ADAMS

IPC: G02B6/35 ,  G02F1/225

CPC classification number: G02B6/357 ,  G02B6/3524 ,  G02B6/3584 ,  G02F1/2257 ,  G02F2203/055

Abstract: Embodiments herein describe using an actuator to tune a waveguide. In one embodiment, the tunable waveguide includes a gap between the waveguide and cladding. The actuator can compress the cladding to shrink this air, bringing the cladding closer to the waveguide. Doing so changes the effective refractive index of the waveguide. Alternatively or additionally, the actuator can increase the gap.