Digital stereo sound enhancement unit and method
    1.
    发明授权
    Digital stereo sound enhancement unit and method 失效
    数字立体声增强单元及方法

    公开(公告)号:US5274708A

    公开(公告)日:1993-12-28

    申请号:US890762

    申请日:1992-06-01

    IPC分类号: H04S1/00

    CPC分类号: H04S1/007

    摘要: A method and apparatus for processing digital stereo signals in a stereo system having a left and right channel in which digital information corresponding to the left and right channels is read from a source of digital information. The left and right channels of information are duplicated and various duplicated signals are processed by predetermined functions. The duplicated signals are manipulated by a plurality of user-defined functions to form a space signal, which is combined with other signals to form left and right output signals.

    摘要翻译: 一种用于处理立体声系统中的数字立体声信号的方法和装置,其具有从数字信息源读取对应于左声道和右声道的数字信息的左声道和右声道。 信息的左右声道被复制,并且通过预定的功能来处理各种复制的信号。 复制的信号由多个用户定义的功能操纵以形成空间信号,其与其他信号组合以形成左和右输出信号。

    Cable modem having a programmable media access controller
    2.
    发明授权
    Cable modem having a programmable media access controller 有权
    电缆调制解调器具有可编程媒体访问控制

    公开(公告)号:US06816940B2

    公开(公告)日:2004-11-09

    申请号:US09785035

    申请日:2001-02-16

    IPC分类号: G06F1336

    CPC分类号: H04L12/2801

    摘要: A cable modem having a programmable media access controller (MAC). A single cable modem device includes all necessary MAC functions. The invention allows programmable MAC functions to support evolving standards (e.g., DOCSIS) without requiring expensive hardware upgrades. Bifurcated microprocessor architecture, in which first processing circuitry is programmed to implement MAC functionality for processing information flowing to and from cable media interface circuitry, and second embedded processor core or host system processor provides operating system functionality are used. Alternatively, separate processor cores provide MAC functionality for downstream and upstream data paths, respectively. Cable media interface circuitry, and other peripheral circuitry, are coupled to a peripheral bus that is linked by a bridge circuit to a system bus. The processing circuitry MAC is communicatively coupled to the system bus. Centralized DMA control directs data transfer between the peripheral and system buses as determined, at least in part, by the programmable MAC.

    Systems and Methods for Raster-to-Block Converter
    3.
    发明申请
    Systems and Methods for Raster-to-Block Converter 有权
    光栅到块转换器的系统和方法

    公开(公告)号:US20110038539A1

    公开(公告)日:2011-02-17

    申请号:US12540330

    申请日:2009-08-12

    IPC分类号: G06K9/00

    CPC分类号: H04N19/85 H04N19/42 H04N19/61

    摘要: A raster to block converter and equivalently a block to raster converter can be implemented using enough memory to contain a single image band, that is a band of pixels of height equal to a single block but spanning the entire width of an image. The raster to block converter can operate at full rate so that as soon as a pixel is read out from the memory a new pixel can be stored in its place. The location of a pixel can be tracked using a mapping involving basic modular arithmetic. This raster to block converter is scalable so that it can work with any size image and block size.

    摘要翻译: 可以使用足够的存储器来实现光栅到块转换器并且等效地块到光栅转换器,以便包含单个图像带,即单个图像带的像素高度等于单个块,但跨越图像的整个宽度。 光栅到块转换器可以以全速率运行,使得一旦像素从存储器读出,可以将新的像素存储在其位置。 可以使用涉及基本模数运算的映射跟踪像素的位置。 这种光栅到块转换器是可扩展的,因此它可以与任何大小的图像和块大小一起工作。

    Single clock cycle CRC engine
    4.
    发明授权
    Single clock cycle CRC engine 有权
    单时钟循环CRC引擎

    公开(公告)号:US06629288B1

    公开(公告)日:2003-09-30

    申请号:US09516373

    申请日:2000-03-01

    IPC分类号: H03M1309

    CPC分类号: H03M13/091 H03M13/6516

    摘要: A communication device, such as a cable modem, having a programmable media access controller (MAC) supported by a programmable CRC engine. The CRC engine computes CRC values for data written to it by the programmable MAC or other software process, thereby relieving processing circuitry of these computationally burdensome functions. The programmable nature of the CRC engine permits compliance with a wide variety standards, including evolving standards such as DOCSIS, without requiring expensive hardware upgrades. In one embodiment of the invention, the CRC engine may be initialized by the programmable MAC with an initial vector prior to CRC computations. The programmable MAC or other software then locates the data bytes (e.g., data frame header data) for which a CRC is to be computed. This information is written to a data register of the CRC engine and a CRC operation is performed. Based on the results, the programmable MAC may determine whether the CRC operation indicates valid data. For example, the CRC value may be compared to value communicating a frame header for purposes of validating received data frames. The CRC engine may advantageously utilize one or more polynomials as determined by the programmable MAC. Further, the CRC engine of the disclosed embodiment may receive data of varying sizes such that write processes may be optimized.

    摘要翻译: 诸如电缆调制解调器的通信设备,具有由可编程CRC引擎支持的可编程媒体接入控制器(MAC)。 CRC引擎计算由可编程MAC或其他软件过程写入的数据的CRC值,从而减轻处理电路中这些计算繁重的功能。 CRC引擎的可编程性能允许符合各种标准,包括不断变化的标准,如DOCSIS,而不需要昂贵的硬件升级。 在本发明的一个实施例中,CRC引擎可以由CRC计算之前的初始向量由可编程MAC初始化。 可编程MAC或其他软件然后定位要计算CRC的数据字节(例如,数据帧头数据)。 该信息被写入CRC引擎的数据寄存器,并执行CRC操作。 基于该结果,可编程MAC可以确定CRC操作是否指示有效数据。 例如,为了验证接收到的数据帧,CRC值可以与传送帧头的值进行比较。 CRC引擎可以有利地利用由可编程MAC确定的一个或多个多项式。 此外,所公开的实施例的CRC引擎可以接收不同大小的数据,使得可以优化写入过程。

    Programmable pattern match engine
    5.
    发明授权
    Programmable pattern match engine 有权
    可编程模式匹配引擎

    公开(公告)号:US07010802B1

    公开(公告)日:2006-03-07

    申请号:US09516284

    申请日:2000-03-01

    IPC分类号: H04N7/173

    摘要: A communication device such as a cable modem that has a first interface for receiving data from a cable media, and a pattern matching engine that evaluates patterns in the data that is received at the first interface of the cable modem and that enables the determination of appropriate procedures for treatment of the data. The pattern matching engine of the cable modem may be configured to match address segments of the data that is received at the first interface of the cable modem. In addition, the pattern matching engine is often a programmable pattern matching engine that may be programmed according to patterns that are desired to matched during various operations of the cable modem. Of note, the pattern matching engine enables pattern matching of various length frame portions. Various aspects of the present invention may also be found in a method for a communication device to compare a predetermined pattern to a pattern that corresponds to a portion of a data frame. The method includes determining acceptable parameters for the data frames that are to be received at the communication device; programming the acceptable parameters into a pattern matching engine in the communication device; receiving a data frame at the communication device; parsing the data frame to obtain a predetermined portion of the data frame; comparing the predetermined portion of the data frame with the acceptable parameters stored in the pattern matching engine; and registering the result of the comparison in a suitable format for access by a microprocessor.

    摘要翻译: 诸如电缆调制解调器的通信设备,其具有用于从有线媒体接收数据的第一接口,以及模式匹配引擎,其评估在电缆调制解调器的第一接口处接收的数据中的模式,并且能够确定适当的 处理数据的程序。 电缆调制解调器的模式匹配引擎可以被配置为匹配在电缆调制解调器的第一接口处接收的数据的地址段。 此外,模式匹配引擎通常是可编程模式匹配引擎,其可以根据期望在电缆调制解调器的各种操作期间匹配的模式来编程。 值得注意的是,图案匹配引擎能够实现各种长度的框架部分的图案匹配。 本发明的各个方面也可以在用于通信设备将预定模式与对应于数据帧的一部分的模式进行比较的方法中找到。 该方法包括确定要在通信设备处接收的数据帧的可接受参数; 将可接受参数编程到通信设备中的模式匹配引擎中; 在所述通信设备处接收数据帧; 解析数据帧以获得数据帧的预定部分; 将数据帧的预定部分与存储在模式匹配引擎中的可接受参数进行比较; 并以适当的格式注册比较结果以供微处理器访问。

    Method for detecting dropouts in data delivered over a bandwidth-limited bus
    6.
    发明授权
    Method for detecting dropouts in data delivered over a bandwidth-limited bus 失效
    用于检测通过带宽限制总线传送的数据丢失的方法

    公开(公告)号:US06640328B1

    公开(公告)日:2003-10-28

    申请号:US09158802

    申请日:1998-09-22

    IPC分类号: G06K500

    CPC分类号: H04N5/775

    摘要: A method for detecting dropouts in digital data transferred over a bus from a digital data source to a computer system. Each address in the computer system buffer memory is initialized to a selected code value known not to exist in the data to be transferred. After sequential transfer of data to the buffer memory, the presence of the selected code value in the buffer memory indicates that a dropout occured.

    摘要翻译: 一种用于检测通过总线从数字数据源传输到计算机系统的数字数据中的丢失的方法。 计算机系统缓冲存储器中的每个地址被初始化为要传送的数据中已知不存在的选定代码值。 在将数据顺序传送到缓冲存储器之后,缓冲存储器中所选择的代码值的存在表示发生了丢失。

    Programmable digital video processing system
    7.
    发明授权
    Programmable digital video processing system 失效
    可编程数字视频处理系统

    公开(公告)号:US5227863A

    公开(公告)日:1993-07-13

    申请号:US564148

    申请日:1990-08-07

    CPC分类号: H04N5/262 G06T15/005

    摘要: Programmable apparatus for digital processing of video signals from multiple sources converted to digital format to provide real-time multiple simultaneous special video effects and suitable for direct interface to a conventional microcomputer bus such as an Apple Macintosh II NuBus. The apparatus includes a matrix of multipliers to do real-time video processing permitting special effects such as fading between at least two video image sources, as well as a priority resolver to control display on a pixel by pixel basis of more than ten sources based upon dynamically programmable priority. In addition, a programmable multiple range thresholder, a hardware window generator capable of generating multiple simultaneous windows, a color look up table and optional image capture capabilities are provided. The apparatus also provides for a light pen input, genlocking and a range of special video effects including zooming, mosaicing, panning and blending.

    摘要翻译: 用于数字处理来自多个转换成数字格式的源的视频信号的可编程设备,以提供实时多个同时的特殊视频效果,并且适用于与诸如Apple Macintosh II NuBus之类的常规微计算机总线的直接接口。 该装置包括乘法器的矩阵,以进行允许诸如至少两个视频图像源之间的衰落的特殊效果的实时视频处理以及优先级分解器,以基于多个来源基于逐个像素的基础来控制显示 动态可编程优先。 另外,提供了可编程多范围阈值器,能够生成多个同时窗口的硬件窗口生成器,颜色查找表和可选的图像捕获能力。 该设备还提供光笔输入,同步锁定和一系列特殊视频效果,包括缩放,镶嵌,平移和混合。