公开(公告)号：US20250005418A1

公开(公告)日：2025-01-02

申请号：US18710133

申请日：2022-11-16

Applicant: D-WAVE SYSTEMS INC.

Inventor： Kelly T. R. Boothby ,  Min Jan Tsai ,  Berta Trullas Clavera ,  Mauricio Reis Filho ,  Paul I. Bunyk

IPC: G06N10/40

Abstract: A superconducting flux qubit readout system may include an input-output system connected to at least one shift register, the shift register comprising a first set, a second set, and a third set of shift register stages arranged in series, the first set of shift register stages coupled to a first set of qubits by a first plurality of latches, and the second set of shift register stages coupled to a second set of qubits by a second plurality of latches. Reading out states of a first set of qubits may include: shifting qubit state information to first holding latches communicatively coupled to a shift register; obtaining, by each shift register stage of the first set of shift register stages, state information from the first holding latches; and, propagating information along the shift register.

公开(公告)号：US20240070510A1

公开(公告)日：2024-02-29

申请号：US18272235

申请日：2022-01-11

Applicant: D-WAVE SYSTEMS INC.

Inventor： Min Jan Tsai ,  Colin C. Enderud ,  Reza Molavi ,  Paul I. Bunyk

IPC: G06N10/40 ,  H03M1/66

CPC classification number: G06N10/40 ,  H03M1/66

Abstract: Programmable components of a quantum processor may be selectively programmed using digital to analog converters (DACs). A DAC with a first stage and a second stage and first and second quantum flux parametron (OFF) loops galvanically coupled to and extending from a respective one of the first stage and the second stage is discussed. The first stage has a first storage loop interrupted by a first Josephson junction and an interface for communicating with an external component. The second stage has a second storage loop interrupted by a second Josephson junction, the second storage loop galvanically coupled to the first storage loop, the first Josephson junction and the second Josephson junction coupled in series to a first control line. A method of loading flux quanta into targeted DAC stages is also discussed.