公开(公告)号：US20030147449A1

公开(公告)日：2003-08-07

申请号：US10065447

申请日：2002-10-18

Applicant: Delphi Technologies, Inc.

Inventor： Abhijeet V. Chavan ,  James H. Logsdon ,  Dan W. Chilcott ,  Han-Sheng Lee ,  David K. Lambert ,  Timothy A. Vas

IPC: G01K007/00 ,  G01K003/00

CPC classification number: G01J5/14 ,  G01J5/12

Abstract: An integrated sensor comprising a thermopile transducer and signal processing circuitry that are combined on a single semiconductor substrate, such that the transducer output signal is sampled in close vicinity by the processing circuitry. The sensor comprises a frame formed of a semiconductor material that is not heavily doped, and with which a diaphragm is supported. The diaphragm has a first surface for receiving thermal (e.g., infrared) radiation, and comprises multiple layers that include a sensing layer containing at least a pair of interlaced thermopiles. Each thermopile comprises a sequence of thermocouples, each thermocouple comprising dissimilar electrically-resistive materials that define hot junctions located on the diaphragm and cold junctions located on the frame. The signal processing circuitry is located on the frame and electrically interconnected with the thermopiles. The thermopiles are interlaced so that the output of one of the thermopiles increases with increasing temperature difference between the hot and cold junctions thereof, while the output of the second thermopile decreases with increasing temperature difference between its hot and cold junctions.

Abstract translation: 一种集成传感器，包括组合在单个半导体衬底上的热电堆换能器和信号处理电路，使得换能器输出信号在处理电路附近被采样。 传感器包括由不重掺杂的半导体材料形成的框架，并且隔膜支撑在该框架上。 隔膜具有用于接收热（例如，红外）辐射的第一表面，并且包括多层，其包括含有至少一对隔行热电堆的感测层。 每个热电堆包括一系列热电偶，每个热电偶包括不同的电阻材料，其限定位于隔膜上的热接点和位于框架上的冷接头。 信号处理电路位于框架上并与热电堆电互连。 热电堆交织使得其中一个热电堆的输出随着其热连接点和冷连接点之间温度差的增加而增加，而第二热电堆的输出随着其热连接点与冷连接点之间温度差的增加而降低。

公开(公告)号：US20030146384A1

公开(公告)日：2003-08-07

申请号：US10065446

申请日：2002-10-18

Applicant: Delphi Technologies, Inc.

Inventor： James H. Logsdon ,  Abhijeet V. Chavan ,  Hamid R. Borzabadi

IPC: G01J005/00

CPC classification number: H01L25/167 ,  H01L23/10 ,  H01L2224/16 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15174 ,  H01L2924/16195 ,  H01L2924/00

Abstract: An optical sensor package capable of being surface mounted, and in a form that enables multiple packages to be fabricated simultaneously and then array tested in a wafer stack prior to singulation. The package comprises a chip carrier, a device chip electrically and mechanically connected to a first surface of the chip carrier with solder connections, and a capping chip secured to the chip carrier to hermetically enclose the device chip. The device chip has an optical sensing element on a surface thereof, while the capping chip has means for enabling radiation to pass therethrough to the device chip. The chip carrier includes conductive vias that are electrically connected to the solder connections of the device chip and extend through the chip carrier to bond pads on a second surface of the chip carrier, enabling the package to be surface mounted with solder connections to a suitable substrate.

Abstract translation: 一种能够被表面安装的光学传感器封装，并且能够在分割之前同时制造多个封装，然后在晶片堆叠中进行阵列测试。 封装包括芯片载体，器件芯片，电连接和机械连接到具有焊料连接的芯片载体的第一表面，以及封装芯片，固定到芯片载体以气密地封装器件芯片。 器件芯片在其表面上具有光学感测元件，而封盖芯片具有用于使辐射能够穿过其中的装置芯片的装置。 芯片载体包括导电通孔，其电连接到器件芯片的焊接连接并延伸穿过芯片载体以在芯片载体的第二表面上接合焊盘，使封装能够被表面安装，焊接连接到合适的衬底 。