Abstract:
A switching element includes: a first electrode; a second electrode; and a silicon-containing chalconitride layer between the first electrode and the second electrode. A switching device includes: a threshold switch material layer between a first electrode and a second electrode. The threshold switch material layer includes a cationic metal element, a chalcogen element, a silicon element and a nitrogen element. A memory device include: a plurality of first wirings arranged in parallel with each other; a plurality of second wirings crossing the first wirings, and arranged in parallel with each other; and a memory cell formed at each intersection of the plurality of first wirings and the plurality of second wirings. The memory cell includes a laminate having a silicon-containing chalconitride layer, an intermediate electrode, and a memory layer.
Abstract:
A graphene transistor includes: a gate electrode on a substrate; a gate insulating layer on the gate electrode; a graphene channel on the gate insulating layer; a source electrode and a drain electrode on the graphene channel, the source and drain electrode being separate from each other; and a cover that covers upper surfaces of the source electrode and the drain electrode and forms an air gap above the graphene channel between the source electrode and the drain electrode.
Abstract:
A power management chip and a power management device including the power management chip. The power management chip includes at least one power switch and a driver unit for generating a driving signal for driving the at least one power switch, the driver unit including one or more circuit units formed on a same substrate as the at least one power switch.