公开(公告)号：US20190084867A1

公开(公告)日：2019-03-21

申请号：US16077086

申请日：2017-02-14

申请人： Heraeus Deutschland GmbH & Co. KG

发明人： Christian NEUMANN

IPC分类号： C03C3/06 ,  H01L45/00 ,  C03C4/14 ,  H01J37/34 ,  C03C23/00

CPC分类号： C03C3/06 ,  C03C3/083 ,  C03C4/14 ,  C03C23/0095 ,  C03C2201/58 ,  C03C2204/00 ,  C23C14/3414 ,  H01J37/3429 ,  H01L45/085 ,  H01L45/142 ,  H01L45/143 ,  H01L45/145 ,  H01L45/147 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1625

摘要： A composition comprising (i) a matrix comprising a metal oxide, metal sulphide and/or metal selenide as the matrix material, the metal oxide, metal sulphide and/or metal selenide comprising at least two metals M1 and M2, and (ii) a metal M3 which is mobile in the matrix. The atomic ratio of M1 to M2 is within the range of 75:25 to 99.99:0.01; the valence states of M1, M2 and M3 are all positive; the valence state of M1 is larger than the valence state of M2; the valence state of M2 is equal to or larger than the valence state of M3; and the metals M1, M2 and M3 are different.

公开(公告)号：US20190051824A1

公开(公告)日：2019-02-14

申请号：US16160291

申请日：2018-10-15

申请人： Arm Limited

发明人： Kimberly Gay REID ,  Lucian SHIFREN

IPC分类号： H01L45/00 ,  G11C13/00 ,  H01L21/768

CPC分类号： H01L45/12 ,  G11C13/0007 ,  G11C2213/15 ,  G11C2213/33 ,  H01L21/76888 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/14 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1633 ,  H01L45/1641 ,  H01L45/165

摘要： Subject matter herein disclosed relates to a method for the manufacture of a switching device comprising a silicon-containing correlated electron material. In embodiments, processes are described for forming the silicon-containing correlated electron material. These processes may use comparatively lower temperatures as compared to those used for forming a correlated electron material comprising a transition metal oxide.

公开(公告)号：US20190013467A1

公开(公告)日：2019-01-10

申请号：US16115311

申请日：2018-08-28

申请人： OVONYX MEMORY TECHNOLOGY, LLC

发明人： Jun Liu ,  Kristy A. Campbell

IPC分类号： H01L45/00

CPC分类号： H01L45/1675 ,  H01L45/04 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/1266 ,  H01L45/1273 ,  H01L45/143 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/1625 ,  Y10S977/773

摘要： A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a nanoparticle is provided between an electrode and a chalcogenide glass region. The method of forming the nanoparticle utilizes a template over the electrode or random deposition of the nanoparticle.

公开(公告)号：US10056266B2

公开(公告)日：2018-08-21

申请号：US15520132

申请日：2015-10-15

申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES ,  CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS) ,  UNIVERSITE GRENOBLE ALPES

发明人： Bernard Dieny ,  Maxime Darnon ,  Gabriele Navarro ,  Olivier Joubert

IPC分类号： H01L27/22 ,  H01L27/24 ,  H01L45/00 ,  C23C14/34 ,  H01L21/4763

CPC分类号： H01L21/4763 ,  C23C14/3407 ,  H01L27/22 ,  H01L27/222 ,  H01L27/24 ,  H01L27/2463 ,  H01L43/08 ,  H01L43/12 ,  H01L45/00 ,  H01L45/06 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/144 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1625 ,  H01L45/1691

摘要： A method for manufacturing a resistive device, includes depositing a first electrically conductive layer on a substrate; forming an etching mask on the first conductive layer; etching the first conductive layer through the mask, such as to obtain a plurality of electrically conductive pillars separated from one another; and forming storage elements with variable electrical resistance at the tops of the electrically conductive pillars, such that each storage element is supported by one of the electrically conductive pillars, the step of forming the storage elements including the following operations depositing a first layer by non-collimated cathode sputtering at normal incidence relative to the substrate; and depositing a second layer on the first layer by cathode sputtering, the second layer including a first chemical species sputtered at an oblique incidence.

公开(公告)号：US20180226578A1

公开(公告)日：2018-08-09

申请号：US15486032

申请日：2017-04-12

申请人： Nantero, Inc.

发明人： C. Rinn Cleavelin ,  CLAUDE L. BERTIN ,  THOMAS RUECKES

IPC分类号： H01L45/00 ,  H01L27/24

CPC分类号： H01L45/149 ,  H01L27/2436 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1675

摘要： Methods for scaling dimensions of resistive change elements, resistive change element arrays of scalable resistive change elements, and sealed resistive change elements are disclosed. According to some aspects of the present disclosure the methods for scaling dimensions of resistive change elements and the resistive change element arrays of scalable resistive change elements reduce the impact of overlapping materials on the switching characteristics of resistive change elements. According to some aspects of the present disclosure the methods for scaling dimensions of resistive change elements include sealing surfaces of resistive change elements. According to some aspects of the present disclosure the methods for scaling dimensions of resistive change elements include forming barriers to copper migration in a copper back end of the line.

公开(公告)号：US20180144795A1

公开(公告)日：2018-05-24

申请号：US15856806

申请日：2017-12-28

申请人： Micron Technology, Inc.

发明人： Yongjun Jeff Hu ,  Tsz W. Chan ,  Christopher W. Petz ,  Everett Allen McTeer

IPC分类号： G11C13/00 ,  H01L45/00 ,  H01L27/24

CPC分类号： G11C13/0004 ,  G11C2213/35 ,  G11C2213/52 ,  G11C2213/71 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/141 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/145 ,  H01L45/148 ,  H01L45/1625 ,  H01L45/1675

摘要： Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming a memory stack out of a plurality of elements. A sidewall liner is formed on a sidewall of the memory stack using a physical vapor deposition (PVD) process, including an adhesion species and a dielectric, such that the adhesion species intermixes with an element of the memory stack to terminate unsatisfied atomic bonds of the element and the dielectric forms a dielectric film with the adhesive species on the sidewall.

公开(公告)号：US09905760B2

公开(公告)日：2018-02-27

申请号：US15181761

申请日：2016-06-14

申请人： The Trustees of the University of Pennsylvania

发明人： I-Wei Chen ,  Xiang Yang

IPC分类号： H01L47/00 ,  H01L45/00 ,  H01L27/24 ,  G11C13/00 ,  G11C11/56

CPC分类号： H01L45/145 ,  G11C11/5685 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0009 ,  G11C2213/15 ,  G11C2213/33 ,  G11C2213/34 ,  H01L27/24 ,  H01L45/085 ,  H01L45/1253 ,  H01L45/1266 ,  H01L45/1625

摘要： Disclosed herein are resistive switching devices having, e.g., an amorphous layer comprised of an insulating aluminum-based or silicon-based material and a conducting material. The amorphous layer may be disposed between two or more electrodes and be capable of switching between at least two resistance states. Circuits and memory devices including resistive switching devices are also disclosed, and a composition of matter involving an insulating aluminum-based or an silicon-based material and a conducting material. Also disclosed herein are methods for switching the resistance of an amorphous material.

公开(公告)号：US20170309817A1

公开(公告)日：2017-10-26

申请号：US15523435

申请日：2015-11-18

申请人： NEC Corporation

发明人： Toshitsugu SAKAMOTO ,  Munehiro TADA

IPC分类号： H01L45/00

CPC分类号： H01L45/1266 ,  H01L27/105 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1273 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1633

摘要： The objective of the present invention is to make it possible to manufacture, with a high yield, a metal deposition type variable-resistance element with which variability of a program voltage and a leakage current under a high resistance state is reduced, while the program voltage is reduced. This variable-resistance element comprises: a first electrode which is embedded in a first insulating film and which supplies metal ions, an upper surface of the first electrode being exposed out of the first insulating film by means of an opening portion in a second insulating film covering the first insulating film; a metal deposition type variable-resistance film which covers the opening portion and is in contact with the upper surface of the first electrode; and a second electrode in contact with the upper surface of the variable-resistance film. The width of the opening portion is greater than the width of the upper surface of the first electrode, and the edge portions of the opening portion are provided in such a way that there is a margin between the edge portions of the opening portion and the edge portions of the upper surface of the first electrode which face the edge portions of the opening portion.

公开(公告)号：US20170309497A1

公开(公告)日：2017-10-26

申请号：US15520132

申请日：2015-10-15

申请人： Commissariat A L'energie Atomique Et Aux Energies Alternatives ,  CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS) ,  UNIVERSITE GRENOBLE ALPES

发明人： Bernard DIENY ,  Maxime DARNON ,  Gabriele NAVARRO ,  Olivier JOUBERT

IPC分类号： H01L21/4763 ,  H01L27/22 ,  H01L27/24 ,  C23C14/34

CPC分类号： H01L21/4763 ,  C23C14/3407 ,  H01L27/22 ,  H01L27/222 ,  H01L27/24 ,  H01L27/2463 ,  H01L43/08 ,  H01L43/12 ,  H01L45/00 ,  H01L45/06 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/144 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1625 ,  H01L45/1691

摘要： A method for manufacturing a resistive device, includes depositing a first electrically conductive layer on a substrate; forming an etching mask on the first conductive layer; etching the first conductive layer through the mask, such as to obtain a plurality of electrically conductive pillars separated from one another; and forming storage elements with variable electrical resistance at the tops of the electrically conductive pillars, such that each storage element is supported by one of the electrically conductive pillars, the step of forming the storage elements including the following operations depositing a first layer by non-collimated cathode sputtering at normal incidence relative to the substrate; and depositing a second layer on the first layer by cathode sputtering, the second layer including a first chemical species sputtered at an oblique incidence.

公开(公告)号：US20170256712A1

公开(公告)日：2017-09-07

申请号：US15263392

申请日：2016-09-13

申请人： Winbond Electronics Corp.

发明人： Yi-Chung Chen ,  Cheng-An Peng ,  Shuo-Che Chang ,  Sung-Ying Wen

IPC分类号： H01L45/00

CPC分类号： H01L45/1625 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1616

摘要： A method for manufacturing an electrode including the following steps is provided. A conductive layer is formed on a base material. A radio frequency physical vapor deposition (RF PVD) transition metal compound layer is formed on the conductive layer by using a RF PVD. A sacrificial layer is formed on the RF PVD transition metal compound layer. A planarization process is performed to remove the sacrificial layer and a portion of the RF PVD transition metal compound layer.