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1.发明授权公开(公告)号：US11245408B2
公开(公告)日：2022-02-08
申请号：US17151673
申请日：2021-01-19
Applicant: FARADAY TECHNOLOGY CORPORATION , Faraday Technology Corp.
Inventor： Feng Xu , Chih-Yuan Hung , Meng Zhao
Abstract: A Successive Approximation Register Analog-to-Digital Converter (SAR ADC) is disclosed. The SAR ADC includes a switched capacitor array, a buffer, a comparator and a control logic circuit. The switched capacitor array is arranged to sample an input signal according to a switch control signal to generate a sampling signal. The buffer is arranged to generate a common mode voltage. The comparator is arranged to receive the sampling signal and the common mode voltage in order to generate a comparison result. The control logic circuit is arranged to generate an output signal according to the comparison result, and generate the switch control signal to control the switched capacitor array. The control logic circuit further generates an operation control signal to adjust a Miller compensation capacitor inside the buffer. An associated control method is also disclosed.
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2.发明申请公开(公告)号：US20210305990A1
公开(公告)日：2021-09-30
申请号：US17151673
申请日：2021-01-19
Applicant: FARADAY TECHNOLOGY CORPORATION , Faraday Technology Corp.
Inventor： Feng Xu , Chih-Yuan Hung , MENG ZHAO
IPC: H03M1/06
Abstract: A Successive Approximation Register Analog-to-Digital Converter (SAR ADC) is disclosed. The SAR ADC includes a switched capacitor array, a buffer, a comparator and a control logic circuit. The switched capacitor array is arranged to sample an input signal according to a switch control signal to generate a sampling signal. The buffer is arranged to generate a common mode voltage. The comparator is arranged to receive the sampling signal and the common mode voltage in order to generate a comparison result. The control logic circuit is arranged to generate an output signal according to the comparison result, and generate the switch control signal to control the switched capacitor array. The control logic circuit further generates an operation control signal to adjust a Miller compensation capacitor inside the buffer. An associated control method is also disclosed.
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公开(公告)号：US09276596B1
公开(公告)日：2016-03-01
申请号：US14726625
申请日：2015-06-01
Inventor： Xingbo Ding , Feng Xu , Min-Yuan Wu
CPC classification number: H03M1/002 , H03M1/1295 , H03M1/468
Abstract: An analog to digital converting apparatus and an initial method thereof are provided. The analog to digital converting apparatus includes a first and a second switching capacitor units, a circuit unit, a first and a second initialization switches, a third and a fourth capacitors and a logic buffer. The first and the second switching capacitor units respectively couple first capacitors and second capacitors to a first logic voltage, a second logic voltage or a first or a second input voltage according to a first control signal, and respectively generate a first and a second voltage. The circuit unit compares the first voltage and the second voltage to generate the first control signal. The first and the second initialization switches are respectively connected in series between the first and the second voltage and a common-mode endpoint. The logic buffer outputs the first or the second logic voltage to the common-mode endpoint.
Abstract translation: 提供了一种模数转换装置及其初始方法。 模数转换装置包括第一和第二开关电容器单元，电路单元，第一和第二初始化开关，第三和第四电容器和逻辑缓冲器。 第一和第二开关电容器单元根据第一控制信号分别将第一电容器和第二电容器耦合到第一逻辑电压，第二逻辑电压或第一或第二输入电压，并分别产生第一和第二电压。 电路单元比较第一电压和第二电压以产生第一控制信号。 第一和第二初始化开关分别串联连接在第一和第二电压和共模端点之间。 逻辑缓冲器将第一或第二逻辑电压输出到共模端点。
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Patent Agency Ranking
公开(公告)号：US10090853B1
公开(公告)日：2018-10-02
申请号：US15867734
申请日：2018-01-11
Applicant: Faraday Technology Corp.
Inventor： Shu-Dong Wu , Feng Xu
Abstract: An analog-to-digital conversion device is provided for converting an input signal pair to generate an output signal. The analog-to-digital conversion device includes switch groups, capacitors, a comparator, and a controller. The switch groups receive the input signal pair and reference voltages, and selects to output one of the input signal pair and the reference voltages according to a control signal to generate selection voltages respectively. The capacitors receive the selection voltages respectively and generate a first comparison voltage and a second comparison voltage. The comparator compares the first comparison voltage and the second comparison voltage to generate a comparison result signal. The controller sets conversion times for converting bits of the output signal according to the comparison result signal, wherein at least two of the conversion times are different.
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公开(公告)号：US10833674B2
公开(公告)日：2020-11-10
申请号：US16554652
申请日：2019-08-29
Applicant: Faraday Technology Corp.
Inventor： Feng Xu , Shu Dong Wu , Zhen Liang Zhang
IPC: H03K17/687 , H03K19/20 , H03M1/12
Abstract: A switch device including a switch circuit and switch controller. The switch circuit comprises first and second switches to selectively enable a path between an input terminal and an output terminal. The switch controller refers to a selection signal and a switch signal to respectively generate a first switch control signal at a first switch control signal output terminal and a second switch control signal at a second switch control signal output terminal. When the voltage level of an input signal at the input terminal is larger than a power voltage, the switch controller generates the first switch control signal and the second switch control signal capable of turning off the switch circuit. When the voltage level of the input signal is not larger than the power voltage, the switch controller generates the first switch control signal and the second switch control signal according to the switch signal.
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公开(公告)号：US20200304120A1
公开(公告)日：2020-09-24
申请号：US16554652
申请日：2019-08-29
Applicant: Faraday Technology Corp.
Inventor： Feng Xu , Shu Dong Wu , Zhen Liang Zhang
IPC: H03K17/687 , H03K19/20
Abstract: A switch device including a switch circuit and switch controller. The switch circuit comprises first and second switches to selectively enable a path between an input terminal and an output terminal. The switch controller refers to a selection signal and a switch signal to respectively generate a first switch control signal at a first switch control signal output terminal and a second switch control signal at a second switch control signal output terminal. When the voltage level of an input signal at the input terminal is larger than a power voltage, the switch controller generates the first switch control signal and the second switch control signal capable of turning off the switch circuit. When the voltage level of the input signal is not larger than the power voltage, the switch controller generates the first switch control signal and the second switch control signal according to the switch signal.
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公开(公告)号：US11418207B1
公开(公告)日：2022-08-16
申请号：US17355173
申请日：2021-06-23
Inventor： Zhengxiang Wang , Feng Xu , Wei-Tai Tsai , Chiao-Wen Lo
Abstract: An analog-to-digital converter (ADC) device equipped with a conversion suspension function and an associated operation method thereof are provided. The ADC device includes: an interleaved clock controller, arranged to generate a first clock signal and a second clock signal according to a master clock signal; and a multi-ADC circuit, coupled to the interleaved clock controller, arranged to perform analog-to-digital conversion. The multi-ADC circuit includes a first ADC and a second ADC, wherein the first ADC performs sampling and conversion operations according to the first clock signal, and the second ADC performs sampling and conversion operations according to the second clock signal. Based on the timing control of the first clock signal and the second clock signal, when any ADC of the first ADC and the second ADC is performing a sampling operation, the other ADC of the first ADC and the second ADC suspends conversion.
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公开(公告)号：US20150009197A1
公开(公告)日：2015-01-08
申请号：US14150214
申请日：2014-01-08
Applicant: FARADAY TECHNOLOGY CORPORATION
Inventor： Feng Xu , Min-Yuan Wu , Chia-Ta Lai , Xing-Bo Ding
IPC: G09G5/00
CPC classification number: G09G5/006 , G09G5/36 , G09G2330/021
Abstract: A video output system at least includes a first video output terminal, a control circuit, a first digital-to-analog converter, and a first bias voltage generator. The first video output terminal is selectively connected with a first video input terminal of a display device through a signal cable. According to a constant detecting current generated by the first digital-to-analog converter, or the first bias voltage generator, the first video output terminal has a detecting voltage for indicating whether the video output system is connected with the display device. When the video output system is connected with the display device, the control circuit enables the first digital-to-analog converter but disables the first bias voltage generator. When the video output system is not connected with the display device, the control circuit disables the first digital-to-analog converter but enables the first bias voltage generator.
Abstract translation: 视频输出系统至少包括第一视频输出端子，控制电路，第一数模转换器和第一偏置电压发生器。 第一视频输出端子通过信号电缆与显示装置的第一视频输入端选择性地连接。 根据由第一数模转换器或第一偏置电压发生器产生的恒定检测电流，第一视频输出端子具有用于指示视频输出系统是否与显示装置连接的检测电压。 当视频输出系统与显示装置连接时，控制电路使第一个数模转换器能够使第一偏置电压发生器失效。 当视频输出系统未与显示设备连接时，控制电路禁用第一个数模转换器，但使能第一偏置电压发生器。
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