公开(公告)号：US20230307715A1

公开(公告)日：2023-09-28

申请号：US18198325

申请日：2023-05-17

Applicant: FDK CORPORATION

Inventor： Masakazu KOBAYASHI ,  Tomohiro FUJISAWA ,  Minako SUZUKI ,  Yuji GOTO

IPC: H01M10/0585 ,  H01M10/48 ,  H01M4/04

CPC classification number: H01M10/0585 ,  H01M4/0471 ,  H01M10/48

Abstract: A solid-state battery includes a battery body in which a positive electrode layer, an electrolyte layer, and a negative electrode layer are stacked; and a reference electrode stacked on a surface in the direction which these layers are stacked. The solid-state battery further includes a positive electrode connected to the positive electrode layer and a negative electrode connected to the negative electrode layer. The positive and negative electrodes are provided on the battery body.

公开(公告)号：US20220344633A1

公开(公告)日：2022-10-27

申请号：US17854106

申请日：2022-06-30

Applicant: FDK CORPORATION

Inventor： Masakazu KOBAYASHI ,  Akihiro MITANI ,  Satoshi HIGUCHI ,  Minako SUZUKI ,  Yuji GOTO

IPC: H01M4/139 ,  H01M10/0562 ,  H01M10/0585 ,  H01M4/04

Abstract: A method of manufacturing a solid-state battery includes forming an electrode that includes a first electrode layer and a second electrode layer facing the first electrode layer and that further includes a buried layer interposed between the first electrode layer and the second electrode layer so as to surround a contact portion where these electrode layers contact each other. For the buried layer, a solid electrolyte with lower electron conductivity than an electrode active material is used, for example. The buried layer is provided between the edge portion of the first electrode layer and the edge portion of the second electrode layer, so that deformation of the first electrode layer and second electrode layer is prevented in the subsequent lamination and thermocompression bonding and thus the occurrence of a short circuit due to such deformation is prevented in the solid-state battery.

公开(公告)号：US20180350507A1

公开(公告)日：2018-12-06

申请号：US16055632

申请日：2018-08-06

Applicant: FDK CORPORATION

Inventor： Daisuke MATSUBAYASHI ,  Mikio KITAOKA ,  Kiyohisa YAMAUCHI ,  Minako SUZUKI

IPC: H01F27/28 ,  H01F17/00 ,  H01F17/04 ,  H01F41/04

CPC classification number: H01F17/00 ,  H01F41/04

Abstract: A laminated transformer includes a magnetic substance layer, a coil lamination stacked on the magnetic substance layer, the coil lamination having formed thereinside a primary coil and a secondary coil, the primary coil being wound spirally in convolutions in a stacking direction, the secondary coil being wound spirally in convolutions in the stacking direction and formed inside the primary coil, a magnetic substance filling inside of the secondary coil in the coil lamination, and a non-magnetic substance filling a region between the primary coil and the secondary coil and filling outside of the primary coil in the coil lamination.

公开(公告)号：US20230369688A1

公开(公告)日：2023-11-16

申请号：US18223729

申请日：2023-07-19

Applicant: FDK CORPORATION

Inventor： Akihiro MITANI ,  Satoshi HIGUCHI ,  Toshiaki NAKANO ,  Masakazu KOBAYASHI ,  Minako SUZUKI

IPC: H01M50/11 ,  H01M50/172 ,  H01M50/117 ,  H01M10/04 ,  H01M10/052 ,  H01M10/058

CPC classification number: H01M50/11 ,  H01M50/172 ,  H01M50/117 ,  H01M10/049 ,  H01M10/052 ,  H01M10/058

Abstract: A solid-state battery includes a solid-state battery body and a coating film. The solid-state battery body has an electrolyte layer containing a solid electrolyte, a positive electrode layer formed on a part of a first principal plane of the electrolyte layer, and a negative electrode layer formed on a part of a second principal plane of the electrolyte layer opposite to the first principal plane. The coating film has an insulating property and covers the solid-state battery body so as to expose a first portion of the positive electrode layer and a second portion of the negative electrode layer. The coating film has hardness higher than that of solid electrolytes contained in the solid-state battery body.

公开(公告)号：US20160276093A1

公开(公告)日：2016-09-22

申请号：US14778430

申请日：2014-02-20

Applicant: FDK CORPORATION

Inventor： Daisuke MATSUBAYASHI ,  Mikio KITAOKA ,  Kiyohisa YAMAUCHI ,  Minako SUZUKI

IPC: H01F27/28 ,  H01F27/245

CPC classification number: H01F27/2804 ,  H01F17/0013 ,  H01F27/245 ,  H01F2017/0066 ,  H01F2027/2809

Abstract: A multilayer inductor for reducing a difference in inductance values and suppressing magnetic interference. Plural electrically insulating magnetic layers and conductive patterns are laminated, each of the conductive patterns being connected in sequence in the lamination direction, so that two coils having substantially the same number of turns and substantially the same coil diameter are formed, the two coils are in parallel such that each coil is a mirror image with respect to a virtual surface between the coils, and ends of each coil are located at an outer peripheral part on a side opposite to the virtual surface, an electrically insulating nonmagnetic pattern corresponding in shape to each of the conductive patterns is between the conductive patterns adjacent in the lamination direction, and at least one electrically insulating nonmagnetic layer is disposed only inside the coils in the lamination direction in place of the magnetic layers.

Abstract translation: 一种用于减小电感值差异并抑制磁干扰的多层电感器。 层压多个电绝缘磁性层和导电图案，每个导电图案在层叠方向上依次连接，从而形成具有大致相同匝数和基本上相同的线圈直径的两个线圈，两个线圈处于 平行，使得每个线圈相对于线圈之间的虚拟表面是镜像，并且每个线圈的端部位于与虚拟表面相对的一侧的外周部分，对应于每个线圈的形状的电绝缘非磁性图案 的导电图案位于层叠方向相邻的导电图案之间，并且至少一个电绝缘非磁性层仅位于层叠方向的线圈内部而不是磁性层。