Systems and methods for non-binary decoding biasing control
    4.
    发明授权
    Systems and methods for non-binary decoding biasing control 有权
    用于非二进制解码偏移控制的系统和方法

    公开(公告)号:US08661324B2

    公开(公告)日:2014-02-25

    申请号:US13227538

    申请日:2011-09-08

    IPC分类号: H03M13/00

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a data detector circuit, a biasing circuit, and a data decoder circuit. The data detector circuit is operable to apply a data detection algorithm to a series of symbols to yield a detected output, and the detected output includes a series of soft decision data corresponding to non-binary symbols. The biasing circuit is operable apply a bias to each of the series of soft decision data to yield a series of biased soft decision data. The data decoder circuit is operable to apply a data decoding algorithm to the series of biased soft decision data corresponding to the non-binary symbols.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了包括数据检测器电路,偏置电路和数据解码器电路的数据处理电路。 数据检测器电路可操作以将数据检测算法应用于一系列符号以产生检测到的输出,并且所检测的输出包括与非二进制符号对应的一系列软判决数据。 偏置电路可操作地将偏置应用于该系列软判决数据中的每一个,以产生一系列偏置的软判决数据。 数据解码器电路可操作以将数据解码算法应用于对应于非二进制符号的一系列偏置软判决数据。

    Systems and methods for selective decode algorithm modification
    5.
    发明授权
    Systems and methods for selective decode algorithm modification 有权
    用于选择性解码算法修改的系统和方法

    公开(公告)号:US08527858B2

    公开(公告)日:2013-09-03

    申请号:US13284767

    申请日:2011-10-28

    IPC分类号: G06F11/10 H03M13/00

    摘要: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a combination data decoder circuit. The combination data decoder circuit includes a first decoder circuit and a second decoder circuit. The first decoder circuit is operable to apply a first data decode algorithm to a decoder input to yield a decoded output. The second decoder circuit is operable to apply a second data decode algorithm to a subset of the decoded output to modify at least one element of the decoded output to yield a modified decoded output.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 例如,公开了包括组合数据解码器电路的数据处理系统。 组合数据解码器电路包括第一解码器电路和第二解码器电路。 第一解码器电路可操作以将第一数据解码算法应用于解码器输入以产生解码输出。 第二解码器电路可操作以将第二数据解码算法应用于解码输出的子集,以修改解码输出的至少一个元素以产生经修改的解码输出。

    Systems and Methods for Selective Decode Algorithm Modification
    6.
    发明申请
    Systems and Methods for Selective Decode Algorithm Modification 有权
    选择性解码算法修改的系统与方法

    公开(公告)号:US20130111309A1

    公开(公告)日:2013-05-02

    申请号:US13284767

    申请日:2011-10-28

    IPC分类号: H03M13/09 G06F11/10

    摘要: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a combination data decoder circuit. The combination data decoder circuit includes a first decoder circuit and a second decoder circuit. The first decoder circuit is operable to apply a first data decode algorithm to a decoder input to yield a decoded output. The second decoder circuit is operable to apply a second data decode algorithm to a subset of the decoded output to modify at least one element of the decoded output to yield a modified decoded output.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 例如,公开了包括组合数据解码器电路的数据处理系统。 组合数据解码器电路包括第一解码器电路和第二解码器电路。 第一解码器电路可操作以将第一数据解码算法应用于解码器输入以产生解码输出。 第二解码器电路可操作以将第二数据解码算法应用于解码输出的子集,以修改解码输出的至少一个元素以产生经修改的解码输出。

    Systems and Methods for Symbol Selective Scaling in a Data Processing Circuit
    7.
    发明申请
    Systems and Methods for Symbol Selective Scaling in a Data Processing Circuit 审中-公开
    数据处理电路中符号选择性缩放的系统和方法

    公开(公告)号:US20130111297A1

    公开(公告)日:2013-05-02

    申请号:US13284826

    申请日:2011-10-28

    IPC分类号: H03M13/09

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing system is discussed that includes: a data detector circuit, a symbol selective scaling circuit, and a data decoder circuit. The data detector circuit is operable to apply a data detection algorithm to a data input guided by a first data set derived from a decoded output to yield a detected output. The symbol selective scaling circuit is operable to selectively scale one or more symbols of a second data set derived from the detected output to yield a scaled data set. The data decoder circuit operable to apply a data decode algorithm to a third data set derived from the scaled data set to yield the decoded output.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,讨论了包括数据检测器电路,符号选择缩放电路和数据解码器电路的数据处理系统。 数据检测器电路可操作以将数据检测算法应用于由从解码输出导出的第一数据集引导的数据输入,以产生检测到的输出。 符号选择性缩放电路可操作以选择性地缩放从检测到的输出导出的第二数据集的一个或多个符号,以产生缩放的数据集。 数据解码器电路可操作以将数据解码算法应用于从缩放数据集导出的第三数据集,以产生解码输出。

    Systems and Methods for Non-Binary Decoding Biasing Control
    8.
    发明申请
    Systems and Methods for Non-Binary Decoding Biasing Control 有权
    非二进制解码偏倚控制系统与方法

    公开(公告)号:US20130067297A1

    公开(公告)日:2013-03-14

    申请号:US13227538

    申请日:2011-09-08

    IPC分类号: H03M13/45 G06F11/10

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a data detector circuit, a biasing circuit, and a data decoder circuit. The data detector circuit is operable to apply a data detection algorithm to a series of symbols to yield a detected output, and the detected output includes a series of soft decision data corresponding to non-binary symbols. The biasing circuit is operable apply a bias to each of the series of soft decision data to yield a series of biased soft decision data. The data decoder circuit is operable to apply a data decoding algorithm to the series of biased soft decision data corresponding to the non-binary symbols.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了包括数据检测器电路,偏置电路和数据解码器电路的数据处理电路。 数据检测器电路可操作以将数据检测算法应用于一系列符号以产生检测到的输出,并且所检测的输出包括与非二进制符号对应的一系列软判决数据。 偏置电路可操作地将偏置应用于该系列软判决数据中的每一个,以产生一系列偏置的软判决数据。 数据解码器电路可操作以将数据解码算法应用于对应于非二进制符号的一系列偏置软判决数据。

    Systems and Methods for Generating Predictable Degradation Bias
    9.
    发明申请
    Systems and Methods for Generating Predictable Degradation Bias 有权
    用于产生可预测的降解偏差的系统和方法

    公开(公告)号:US20130063835A1

    公开(公告)日:2013-03-14

    申请号:US13227544

    申请日:2011-09-08

    IPC分类号: G11B5/03 G11C5/14 G11B5/035

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a data detector circuit and a bias calculation circuit. The data detector circuit is operable to apply a data detection algorithm to a first data set to yield a first series of soft decision data, and to apply the data detection algorithm to a second data set to yield a second series of soft decision data. The bias calculation circuit operable to calculate a series of bias values based at least in part on the first series of soft decision data and the second series of soft decision data. The series of bias values correspond to a conversion between the first series of soft decision data and the second series of soft decision data.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了包括数据检测器电路和偏置计算电路的数据处理电路。 数据检测器电路可操作以将数据检测算法应用于第一数据集以产生第一系列软判决数据,并将数据检测算法应用于第二数据集以产生第二系列软判决数据。 偏置计算电路可操作以至少部分地基于第一系列软判决数据和第二系列软判决数据来计算一系列偏置值。 一系列偏差值对应于第一系列软判决数据与第二系列软判决数据之间的转换。